DS33W41+ Maxim Integrated Products, DS33W41+ Datasheet - Page 93

IC MAPPING ETHERNET 256CSBGA

DS33W41+

Manufacturer Part Number
DS33W41+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33W41+

Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The Encapsulator’s Tag 2 Insertion function (in PP.ET2DHR and PP.ET2DLR) is available to insert a 4-byte VLAN
tag immediately after the Source Address (SA). Any existing VLAN tags are “pushed” lower in the frame. The
resulting encapsulated frame format is shown below. Note that when in this mode, the pFCS calculation begins
with the 13
the eHEC verification fails, the received WAN packet is discarded.
Figure 8-19. GFP-F LINEAR EXTENSION Encapsulated Frame Format
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
th
byte of the frame. The received eHEC value is verified by the Decapsulator. While in Linear mode, if
Q-in-Q VLAN TAG (existing/optional)
MSB
GFP Payload FCS (optional)
GFP Payload Length (PLI)
GFP CID, Spare, & eHEC
Destination Address (DA)
2nd Octet of GFP tHEC
2nd Octet of GFP Type
1st Octet of GFP tHEC
1st Octet of GFP Type
Source Address (SA)
VLAN TAG (optional)
Length / EtherType
MAC Client Data
PAD (optional)
FCS for MAC
GFP cHEC
LSB
Bytes
46-1500
1
1
1
6
6
2
2
1
4
4
4
2
4
4
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