NCN6004AFTBR2G ON Semiconductor, NCN6004AFTBR2G Datasheet
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NCN6004AFTBR2G
Specifications of NCN6004AFTBR2G
NCN6004AFTBR2GOS
NCN6004AFTBR2GOSTR
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NCN6004AFTBR2G Summary of contents
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... Power to CC MARKING DIAGRAM Work Week G ORDERING INFORMATION Device NCN6004AFTBR2 NCN6004AFTBR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 http://onsemi.com 1 TQFP48 CASE 932F PLASTIC NCN6004A AWLYYWWG ...
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CARD_SEL 5 6 PGM 7 CS PWR_ON 8 I/O_A 9 RESET_A 10 C4_A 11 C8_A L2a CHIP SELECT ...
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INPUT VOLTAGE ANLG_VCC 42 MONITOR AGND 43 GND INT STATUS V 100 PWR_ON CNTL A3 4 CARD_SEL 5 6 ...
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PIN DESCRIPTION Pin Symbol Type 1 A0 INPUT 2 A1 INPUT 3 A2 INPUT 4 A3 INPUT 5 CARD_SEL INPUT Á Á Á Á Á Á Á Á Á Á Á Á Á Á 6 PGM DIGITAL INPUT Á Á ...
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PIN DESCRIPTION (continued) Pin Symbol Type 10 RESET_A INPUT 11 C4_A INPUT 12 C8_A INPUT 13 CLOCK_IN_A Clock Input, High Impedance 14 ANLG_GND POWER 15 CLOCK_IN_B Clock Input, High Impedance 16 C8_B INPUT 17 C4_B INPUT NCN6004A Description The signal ...
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PIN DESCRIPTION (continued) Pin Symbol Type 18 RESET_B INPUT 19 I/O_B INPUT/OUTPUT 20 CRD_DET_A INPUT 21 CRD_C8_A OUTPUT 22 CRD_C4_A OUTPUT 23 CRD_RST_A OUTPUT 24 CRD_IO_A INPUT/OUTPUT 25 PWR_GND POWER 26 L2_A POWER 27 L1_A POWER 1. The external inductors ...
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PIN DESCRIPTION (continued) Pin Symbol Type 28 PWR_VCC_A POWER 29 CRD_VCC_A POWER 30 CRD_CLK_A OUTPUT 31 CRD_CLK_B OUTPUT 32 CRD_VCC_B POWER 33 PWR_VCC_B POWER 34 L2b POWER 35 L1b POWER 36 PWR_GND POWER 37 CRD_IO_B INPUT/OUTPUT 38 CRD_RST_B OUTPUT 1. ...
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PIN DESCRIPTION (continued) Pin Symbol Type 39 CRD_C4_B OUTPUT 40 CRD_C8_B OUTPUT 41 CRD_DET_B INPUT 42 ANLG_VCC POWER 43 ANLG_GND GROUND 44 MUX_MODE INPUT 45 EN_RPU INPUT 46 STATUS OUTPUT NCN6004A Description This pin controls the card #B C4 contact, ...
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PIN DESCRIPTION (continued) Pin Symbol Type INT 47 OUTPUT 48 ANLG_GND GROUND MAXIMUM RATINGS (Note 2) Rating Power Supply Input Supply Voltage V in Power Supply Input Current Digital Input Pins Digital Output Pins Card Interface Pins ESD Capability, Human ...
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POWER SUPPLY SECTION General test conditions, unless otherwise specified: Operating temperature: −25°C < +3.0 V, CRD_VCC_A = CRD_VCC_B = +5 Rating (both external cards running simultaneously) out @ 3.0 ...
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POWER SUPPLY SECTION General test conditions, unless otherwise specified: Operating temperature: −25°C < +3.0 V, CRD_VCC_A = CRD_VCC_B = +5.0 V. (continued) CC Rating Output Card Supply Shut Off Time @ = 10 mF, ceramic. C out ...
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CARD INTERFACE SECTION @ 2.70 < V otherwise noted) CRD_VCC_A = CRD_VCC_B = 1 3 5.0 V Rating CRD_RST_A, CRD_RST_B Output Voltage Output RST High Level @ Irst = −200 mA Output RST Low Level @ ...
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DIGITAL DYNAMIC SECTION NORMAL OPERATING MODE Rating Card Signal Sequence Interval, CRD_VCC_A and CRD_VCC_B: CRD_IO_A, CRD_RST_A, CRD_CLK_A, CRD_C4_A, CRD_C8_A CRD_IO_B, CRD_RST_B, CRD_CLK_B, CRD_C4_B, CRD_C8_B Internal RESET Delay Internal STATUS Delay Time PWR_ON Low State Pulse Width (Figure 11), Assuming CRD_VCC ...
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PROGRAMMING AND STATUS FUNCTIONS The NCN6004A includes a programming interface and a status interface. Figure 4 illustrates the sequence one must follow to enter and exit the programming mode. Table 1 and Table 2 provide the logical functions associated with ...
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Table 2. Programming Functions (Conditions at start−up are in Bold) (HEX) PGM CARD_SEL ...
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Table 3. Status Pins Data STATE (HEX) PGM ...
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PARALLEL/MULITPLEXED OPERATION MODES The logic input MUX_MODE, pin 44, provides a way to select the operation mode of the NCN6004A. Depending upon the logic level, the device operates either in a parallel mode (all the card pins, on the mP ...
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CARD_A or CARD_B neither possible to connect directly I/O_A to I/O_B nor to connect the I/O_B pin to ground or voltage supply. The multiplexer is activated and the CARD_SEL signal is used to select the card ...
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On the other hand, the Power Down sequence is automatically activated when the V bat the VCC_OK level, regardless of the logic conditions Figure 10. Power Down Sequence: Timing Details NCN6004A present on the control pins, or when the related ...
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CARD DETECTION The card detector circuit provides a constant low current to bias the CRD_DET_A and CRD_DET_B pins, yielding a logic High when no card is present and the external switch is Normally Open type. The internal logic associated with ...
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POWER MANAGEMENT The main purpose of the power management is to provides the necessary output voltages to drive the 1. 5.0 V smart card types. On top of that, the DC/DC converter efficiency must absorb a ...
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CS CARD_SEL tpwrset tpwrpre PWR_ON SET RESET tpwrp NOTE: tpwrset: This delay is necessary to latch–up the PWR_ON condition and does not represent the CRD_VCC output voltage rise time. tpwrlow: This delay includes the internal ISO7816−3 power down sequence to ...
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When the output voltage reaches the specified value (1. 3 5.0 V), Q1 and Q16 are switched OFF immediately to avoid over voltage on the output load. In the mean time, the two extra NMOS Q2 ...
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Since the output inductor L1 and the reservoir capacitor C1 carry relative high peak current, low ESR devices must be used to prevent the system from poor output voltage ripple and low efficiency. Using ceramic capacitors, X5R or X7R type, ...
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NOTE: Operating conditions under full output load. Figure 17. Typical CRD_VCC Ripple Voltage 3.0 V out out 60 ESR = 2.5 3.0 ...
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Test conditions: Input V According to the ISO7816−3 and EMV specifications, the interface shall limits the CRD_VCC output current to 200 mA maximum, under short circuit conditions. The 180 160 140 120 100 80 60 ...
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CLOCK DIVIDER The main purpose of the built in clock generator is four folds: 1. Adapts the voltage level shifter to cope with the different voltages that might exist between the MPU and the Smart Card 2. Provides a frequency ...
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CLOCK_IN CLOCK : 2 CLOCK : 4 CLOCK : 8 CARD_SEL CRD_CLK CLOCK programming is activated by the PGM rising edge. The example given in Figure 25 highlights the delay coming from the internal clock re−synchronization. Since the clock signal ...
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NCN6004A Figure 27. Clock Divider Operation Figure 28. Clock Divider Timing Details Figure 29. Clock Divider: Run to Stop High Operation http://onsemi.com 29 ...
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The input clock A and B can be re routed to either CRD_CLK_A or CRD_CLK_B output pins by using the programming function as defined in Table 2 and Table 7. The clock signals can have any frequency value necessary to ...
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CLOCK GEN. CLOCK GEN. Figure 31. Parallel Operation Wiring " MUX_MODE = Low When the chip operates in the parallel mode, all the logic signals must be independently controlled by the microcontroller as depicted in Figure 31. The MUX_MODE pin ...
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MUX_MODE = Low " PARALLEL OPERATION The bi−directional switch Q9 is OFF and the I/O signals are routed straightforward to their appropriate outputs. The two I/O lines can operate simultaneously, depending upon the mP capabilities, regardless of the CARD_SEL signal ...
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NOTE: ESD Protection The NCN6004A includes silicon devices to protect the pins against the ESD spikes voltages. To cope with the different ESD voltages developed across these pins, the built in structures have been designed to handle either 2 kV, ...
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TEST BOARD SCHEMATIC DIAGRAM J2 6 I/O 7 VPP GND 5 GND Vcc 1 RST 2 CLK Swb 9 Swa 10 GND SMARTCARD_B 1 TP5 IO_B 1 TP4 C8_B 1 TP3 C4_B 1 TP2 CLK_B ...
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NCN6004A Figure 36. Demo Board PCB Top Overlay http://onsemi.com 35 ...
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NCN6004A Figure 37. Demo Board PCB Top Layer http://onsemi.com 36 ...
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NOTE: Note: the demo board is built with a four layers PCB, the internal ones being dedicated to V planes. NCN6004A Figure 38. Demo Board PCB Bottom Layer http://onsemi.com 37 and GND CC ...
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PIN FUNCTIONS AND DESCRIPTION POWER SUPPLY SECTION . . . . . . . . . . . . . . . DIGITAL INPUT SECTION @ 2.70 < V Normal Operating Mode . . . . . . . . ...
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ABBREVIATIONS L1a and L1b DC/DC external inductor #A L2a and L2b DC/DC external inductor #B Cout Output Capacitor CRD_VCC Card Power Supply Input VCC MPU Power Supply Voltage Icc Current at card VCC pin Class Smart Card ...
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... M SECTION AE−AE 0.250 GAUGE PLANE N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 40 NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994 ...