W83697HG Nuvoton Technology Corporation of America, W83697HG Datasheet - Page 80

• Manufacturer Part Number: W83697HG
• Description: IC LPC SUPER I/O 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.10 Logical Device 7 (Game Port GPIO Port 1)
CR30 (Default 0x00)
CR60, CR 61 (Default 0x02, 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR62, CR 63 (Default 0x00, 0x00)
CRF0 (GP10-GP17 I/O selection register. Default 0xFF)
CRF1 (GP10-GP17 data register. Default 0x00)
CRF2 (GP10-GP17 inversion register. Default 0x00)
When set to a '1', the incoming/outgoing port value is inverted.
When set to a '0', the incoming/outgoing port value is the same as in data register.
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
If a port is programmed to be an output port, then its respective bit can be read/written
If a port is programmed to be an input port, then its respective bit can only be read.
These two registers select the GPIO1 base address [0x100:0xFFF] on 1 byte boundary
IO address : CRF1 base address
Bit 7 - 1: Reserved.
Bit 0: = 1 Activate Game Port./GP1
These two registers select the Game Port base address [0x100:0xFFF] on 8 byte boundary.
= 0 Game Port/GP1 is inactive.
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Publication Release Date: May 30, 2005
W83697HF/ HG
Revision A1