W83697HG Nuvoton Technology Corporation of America, W83697HG Datasheet - Page 77

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W83697HG

Manufacturer Part Number
W83697HG
Description
IC LPC SUPER I/O 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83697HG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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CRF0 (Default 0x3F)
7.7 Logical Device 2 (UART A)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0xF8 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x04 if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (Default 0x00)
Bit 7: Reserved.
Bit 6 - 3: ECP FIFO Threshold.
Bit 2 - 0: Parallel Port Mode (CR28 PRTMODS2 = 0)
Bit 7 - 1: Reserved.
Bit 0: = 1 Activates the logical device.
These two registers select Serial Port 1 I/O base address [0x100:0xFF8] on 8 byte boundary.
Bit 7 - 4: Reserved.
Bit 3 - 0: These bits select IRQ resource for Serial Port 1.
Bit 7 - 2: Reserved.
Bit 1 - 0: SUACLKB1, SUACLKB0
= 100 Printer Mode (Default)
= 000 Standard and Bi-direction (SPP) mode
= 001 EPP - 1.9 and SPP mode
= 101 EPP - 1.7 and SPP mode
= 010 ECP mode
= 011 ECP and EPP - 1.9 mode
= 111 ECP and EPP - 1.7 mode.
= 0 Logical device is inactive.
= 00
= 01
= 10
= 11
UART A clock source is 1.8462 Mhz (24MHz/13)
UART A clock source is 2 Mhz (24MHz/12)
UART A clock source is 24 Mhz (24MHz/1)
UART A clock source is 14.769 Mhz (24mhz/1.625)
- 74 -
W83697HF/ HG

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