PCA9701D,112 NXP Semiconductors, PCA9701D,112 Datasheet - Page 16

• Manufacturer Part Number: PCA9701D,112
• Description: IC SPI GPI 16-BIT 24-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9701D,112

• Applications: Automotive
• Interface: SPI Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Package / Case: 24-SOIC (7.5mm Width)
• Mounting Type: Surface Mount
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Package Type: SO
• Pin Count: 24
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935283617112; PCA9701D; PCA9701D

NXP Semiconductors
11. Dynamic characteristics
Table 6.
V
PCA9701_PCA9702_5
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
max
r
f
WH
WL
SPILEAD
SPILAG
su(SDIN)
h(SDIN)
en(SDOUT)
dis(SDOUT)
v(SDOUT)
su(SCLK)
h(SCLK)
POR
rel(int)
v(INT_N)
DD
Fig 14. Timing diagram
= 2.5 V to 5.5 V; V
SDOUT
SCLK
SDIN
INT
CS
Dynamic characteristics
Parameter
maximum input clock frequency
rise time
fall time
pulse width HIGH
pulse width LOW
SPI enable lead time
SPI enable lag time
SDIN set-up time
SDIN hold time
SDOUT enable time
SDOUT disable time
SDOUT valid time
SCLK set-up time
SCLK hold time
power-on reset pulse time
interrupt release time
valid time on pin INT
high-impedance
t
su(SCLK)
SS
= 0 V; T
t
en(SDOUT)
t
SPILEAD
t
rel(int)
amb
t
= 40 C to +125 C; unless otherwise specified.
su(SDIN)
50 %
MSB out
MSB in
t
Conditions
SDOUT; 10 % to 90 % at 5 V
SDOUT; 90 % to 10 % at 5 V
SCLK
SCLK
CS falling edge to SCLK rising edge
SCLK falling edge to CS rising edge
SDIN to SCLK falling edge
from SCLK falling edge
from CS LOW to
SDOUT low-impedance;
from rising edge of CS to SDOUT
high-impedance;
from rising edge of SCLK;
SCLK falling to CS falling
SCLK rising after CS rising
time before CS is active
after V
after CS going LOW;
after INn changes or INT_EN
goes HIGH
h(SDIN)
Rev. 05 — 11 November 2009
DD
t
WH
> V
POR
t
v(SDOUT)
t
WL
Figure 17
Figure 19
Figure 17
Figure 18
18 V tolerant SPI 16-bit/8-bit GPI with INT
PCA9701; PCA9702
50 %
Min
-
-
-
50
50
50
50
20
30
-
-
-
50
50
-
-
-
t
dis(SDOUT)
t
SPILAG
Typ
-
35
25
-
-
-
-
-
-
-
-
-
-
-
-
-
-
t
© NXP B.V. 2009. All rights reserved.
h(SCLK)
002aac428
Max
5
60
50
-
-
-
-
-
-
55
85
55
-
-
250
500
100
16 of 28
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns