pca9701 NXP Semiconductors, pca9701 Datasheet
pca9701
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pca9701 Summary of contents
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... The input level is recognized as a HIGH when it is greater than 0.7 PCA9701 can monitor switch inputs and the PCA9702 can monitor switch inputs. The falling edge of the CS pin samples the input port status and clears the interrupt. When CS is LOW, the rising edge of the SCLK loads the shift register and shifts the value out of the shift register ...
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... PCA9701PW PCA9701PW TSSOP24 PCA9702PW PCA9702 5. Block diagram IN0 IN1 (1) INn ( for PCA9701 for PCA9702 Fig 1. Block diagram of PCA9701; PCA9702 PCA9701_PCA9702_2 Product data sheet Package Name Description HWQFN24 plastic thermal enhanced very very thin quad flat package; no leads; 24 terminals; body 4 SO24 plastic small outline package ...
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... Fig 3. Pin configuration for TSSOP24 18 CS SDOUT 17 IN15 16 IN14 INT_EN 15 IN13 14 IN12 13 IN11 002aad050 Fig 5. Pin configuration for TSSOP16 Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT INT 2 23 SDIN 3 22 SCLK 4 21 IN0 ...
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... V SS Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Description 3-state serial data output; normally high-impedance open-drain interrupt output (active LOW) interrupt output enable 1 = interrupt is enabled 0 = interrupt is disabled and high-impedance ...
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... SPI bus operation The PCA9701 or PCA9702 interfaces with the controller via the 4-wire SPI bus that is comprised of the following signals: chip select (CS), serial clock (SCLK), serial data in (SDIN), and serial data out (SDOUT). To access the device, the controller asserts CS LOW, then sends SCLK and SDIN ...
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... DATA[n:0] is data on the input pins, IN[n:0]. For 8-bit GPI (PCA9702 for 16-bit GPI (PCA9701 15. Shaded areas indicate active but invalid data. Fig 6. Register access timing 7.2 Interrupt output INT is the open-drain interrupt output and is active LOW. A pull-up resistor of approximately recommended ...
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... Input port status Input status register – Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT [1] INT high high-Z high-Z Equation 1 © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors 8. Application design-in information ( for PCA9701 for PCA9702 Fig 7. Typical application PCA9701_PCA9702_2 Product data sheet 2 5 1.5 k 100 k IN0 relay 18 V 100 k IN1 180 V PCA9701/ open PCA9702 500 k IN2 (1) INn V SS Rev. 02 — 29 August 2007 PCA9701 ...
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... V. For more detail of leakage current specification, please refer to Table 5 “Static [ for PCA9701 for PCA9702. PCA9701_PCA9702_2 Product data sheet 18 V tolerant SPI 16-bit/8-bit GPI with INT ...
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... SDIN 5 SDOUT SDOUT Section 7.3. Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Min Typ 2.5 3 ...
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... DD POR after CS going LOW; Figure 13 after INn changes or INT_EN goes HIGH su(SDIN) t h(SDIN) MSB in t v(SDOUT) MSB out Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Min Typ - - - ...
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... SCLK SDOUT IN0 t POR timing POR CS INn STATE 0 INT_EN t v(INT_N) INT Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT 2 IN1 002aad158 STATE 1 STATE 0 t v(INT_N rel(int) rel(int) 002aad159 © NXP B.V. 2007. All rights reserved. ...
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... R = load resistance load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T generators. PCA9701_PCA9702_2 Product data sheet PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT PULSE DUT GENERATOR ...
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... 0.49 0.32 15.6 7.6 10.65 1.27 0.36 0.23 15.2 7.4 10.00 0.019 0.013 0.61 0.30 0.419 0.05 0.014 0.009 0.60 0.29 0.394 REFERENCES JEDEC JEITA MS-013 Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT detail 1.1 1.1 1.4 0.25 0.25 0.1 0.4 1.0 0.043 ...
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... 2.5 scale (1) ( 0.30 0.2 7.9 4.5 0.65 0.19 0.1 7.7 4.3 REFERENCES JEDEC JEITA MO-153 Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 ...
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... 2.5 scale (1) ( 0.30 0.2 5.1 4.5 0.65 0.19 0.1 4.9 4.3 REFERENCES JEDEC JEITA MO-153 Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 ...
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... 2.5 scale (1) ( 4.1 2.25 4.1 2.25 0.5 2.5 3.9 1.95 3.9 1.95 REFERENCES JEDEC JEITA - - - MO-220 Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT detail 0.5 2.5 0.1 0.05 0.05 0.1 0.3 EUROPEAN PROJECTION SOT994-1 c ISSUE DATE ...
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... Solder bath specifications, including temperature and impurities PCA9701_PCA9702_2 Product data sheet PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Rev. 02 — 29 August 2007 © NXP B.V. 2007. All rights reserved ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 18. Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Figure 18) than a PbSn process, thus 350 220 220 350 to 2000 > 2000 260 260 250 ...
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... Human Body Model Machine Model Most Significant Bit Printed-Circuit Board Resistor-Capacitor network Serial Peripheral Interface Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT peak temperature 001aac844 © NXP B.V. 2007. All rights reserved. time ...
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... Table 1 “Ordering information”: – deleted type number PCA9701BS – added type number PCA9701HF – Topside mark for PCA9702PW changed from “PCA9702PW” to “PCA9702” Section 6 “Pinning information” – deleted pin configuration HVQFN24 – ...
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... SOT905-1 (HVQFN24) – added Figure 17 “Package outline SOT994-1 (HWQFN24)” Objective data sheet Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Change notice Supersedes Min from “0” to “-” IL Min from “ ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 29 August 2007 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT © NXP B.V. 2007. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: PCA9701_PCA9702_2 All rights reserved. Date of release: 29 August 2007 ...