LTC4305IGN Linear Technology, LTC4305IGN Datasheet - Page 9
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LTC4305IGN
Manufacturer Part Number
LTC4305IGN
Description
IC BUFFER BUS 2WR ADDRESS 16SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC4305CGNPBF.pdf
(20 pages)
Specifications of LTC4305IGN
Applications
Multiplexer with Amplifier
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
2.2 V ~ 5.5 V
Package / Case
16-SSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC4305IGN
Manufacturer:
LT
Quantity:
10 000
Company:
Part Number:
LTC4305IGN#PBF
Manufacturer:
LT
Quantity:
1 626
Part Number:
LTC4305IGN#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
OPERATIO
Register 2 (02h)
BIT NAME
* For Type, “R/W” = Read Write, “R” = Read Only
**
d7 Reserved
d6 Reserved
d5 Connection
d4 Reserved
d3 Reserved
d2 Mass Write Enable
d1 Timeout Mode Bit 1
d0 Timeout Mode Bit 0
TIMSET1
Requirement
0
0
1
1
TIMSET0
U
0
1
0
1
TYPE* DESCRIPTION
R/W Sets logic requirements for
R/W Enable Mass Write Address using
R/W Stuck Low Timeout Set Bit 1**
R/W Stuck Low Timeout Set Bit 0**
R
R
R
R
Not Used
Not Used
downstream buses to be connected
to upstream bus
0 = Bus Logic State bits (see register
3) of buses to be connected must be
high for connection to occur (default)
1 = Connect regardless of
downstream logic state
Not Used
Not Used
address (1011 110)b
0 = Disable Mass Write
1 = Enable Mass Write (default)
Timeout Disabled (Default)
Timeout After 7.5ms
Timeout After 30ms
Timeout After 15ms
TIMEOUT MODE
Register 3 (03h)
BIT NAME
* For Type, “R/W” = Read Write, “R” = Read Only
†
buses to the master, so that the master can choose not to connect to a low
downstream bus. A given bit is a “don’t care” if its associated downstream
bus is already connected to the upstream bus.
d7 Bus 1 FET State
d6 Bus 2 FET State
d5 Reserved
d4 Reserved
d3 Bus 1 Logic State
d2 Bus 2 Logic State
d1 Reserved
d0 Reserved
These bits are meant to give the logic state of disconnected downstream
TYPE* DESCRIPTION
R/W Sets and indicates state of FET
R/W Sets and indicates state of FET
R
R
R
R
R
R
switches connected to downstream
bus 1
0 = switch open (default)
1 = switch closed
switches connected to downstream
bus 2
0 = switch open (default)
1 = switch closed
Not Used
Not Used
Indicates logic state of downstream
bus 1; only valid when disconnected
from upstream bus
0 = SDA1, SCL1 or both are below 1V
1 = SDA1 and SCL1 are both above
1V
Indicates logic state of downstream
bus 2; only valid when disconnected
from upstream bus
0 = SDA2, SCL2 or both are below 1V
1 = SDA2 and SCL2 are both above
1V
Not Used
Not Used
LTC4305
†
†
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