PI7C9X20505GPBNDE Pericom Semiconductor, PI7C9X20505GPBNDE Datasheet - Page 77

IC PCIE PACKET SWITCH 256BGA

PI7C9X20505GPBNDE

Manufacturer Part Number
PI7C9X20505GPBNDE
Description
IC PCIE PACKET SWITCH 256BGA
Manufacturer
Pericom Semiconductor
Series
GreenPacket™r

Specifications of PI7C9X20505GPBNDE

Applications
Data Transport
Interface
Advanced Configuration Power Interface (ACPI)
Package / Case
256-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-

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12.3 AC SPECIFICATIONS
June 2009 – Revision 1.5
Pericom Semiconductor
a. Measured with Vtt = 1.2V, HiDrv=’0’,LowDrv=’0’ and Dtx=’0000’.
b. Minimum swing assumes LoDrv = 1, HiDrv = 0 and Dtx =1100
c. Max swing assumes LoDrv = 0, HiDrv = 1, Dtx = 0010, VTT = 1.8V
d. As measured between 20% and 80% points. Will depend on package characteristics.
e. Measured using PCI Express Compliance Pattern
Table 12-3 Transmitter Characteristics
Symbol
Voltage Parameters
V
V
V
V
V
V
V
V
V
RL
RL
Z
Z
T
Jitter Parameters
UI
T
T
T
MAX-JITTER
Timing Parameters
L
L
L
T
T
T
T
T
OSE
TX-DIFF-DC
TX-RISE, TTX-FALL
TX-MAX-JITTER
TX-EYE
TX-EYE-MEDIAN-to-
TLAT-10
TLAT-20
TX-SKEW
TX-IDLE-SET-TO-IDLE
EIExit
BTEn
RxDetectEn
RxDetect
TX-DIFF
SW
OL
OH
TX-CM-AC
TX-CM-HiZ
TX-DE-RATIO
TX-IDLE-DIFFp
TX-RCV-DETECT
TX-DIFF
TX-CM
a
Description
Output voltage compliance @ typical swing
V
V
Supported TX output voltage range (pp,
differential)
Low-level output voltage
High-level output voltage
Transmit common-mode voltage in L0
Transmit common-mode voltage in L0s
(TX) & L1
De-emphasized differential output
voltage
Electric Idle differential peak voltage
Voltage change during Receive
Detection
Transmitter Differential Return loss
Transmitter Common Mode Return loss
Single-ended output impedance
DC Differential TX Impedance
Rise / Fall time of TxP, TxN outputs
Unit Interval
Transmitter total jitter (peak-to-peak)
Minimum TX Eye Width (1 -
T
Maximum time between the jitter
median and
maximum deviation from the median
Transmitter data latency (for n=10)
Transmitter data latency (for n=20)
Transmitter data skew between any 2
lanes
Maximum time to transition to a valid
electrical idle after sending an Electrical
Idle ordered set
Time to exit Electrical Idle (L0s) state
into L0
Time from asserting BeaconTxEn to
beacon being transmitted on the lane
Pulse width of RxDetectEn input
RxDetectEn falling edge to RxDetect
delay
TX-MAX-JITTER
TX-DIFFp
TX-DIFFpp
(peak-to-peak, single ended)
(peak-to-peak, differential)
)
Page 77 of 81
399.88
Min
400
0.50
0.75
400
800
9.8
10
80
40
80
0
6
9
9
0
b
V
V
TT
V
TT
- 1.5 *V
TT
V
- 0.5V
V
Typical
5Port-5Lane PCI Express Switch
TX-CM-AC
- V
1000
TX-DIFFp
500
100
400
50
12
30
10
4
1
TX-DIFFp
TX-DIFFp
TX-DIFFp
GreenPacket
400.12
200ps
Max.
1500
0.125
-7.96
1200
0.25
1.45
110
10.2
600
120
2 +
20
60
11
11
16
80
6
2
d
e
c
PI7C9X20505GP
Unit
mV
mV
mV
mV
mV
dB
dB
dB
UI
UI
UI
UI
UI
UI
ps
ps
ns
ns
ns
us
ns
V
V
V
V
Datasheet
TM
Family

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