PI7C9X20505GPBNDE Pericom Semiconductor, PI7C9X20505GPBNDE Datasheet - Page 3

• Manufacturer Part Number: PI7C9X20505GPBNDE
• Description: IC PCIE PACKET SWITCH 256BGA
• Manufacturer: Pericom Semiconductor
• Series: GreenPacket™r

Specifications of PI7C9X20505GPBNDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

REVISION HISTORY
Date
12/28/06
01/02/07
01/03/07
01/18/07
04/13/07
06/21/07
07/25/07
08/17/07
10/08/07
June 2009 – Revision 1.5
Pericom Semiconductor
Revision Number
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Proofreading and Editing
Some defaults values of the pins are changed in Chapter 3
Changed some pins names in Chapter 3 and Chapter 4
Corrected pin description for ATT_IND[4] in section 3.3
Updated Chapter 14 Ordering Information
Added Chapter 6.2 SMBus
Corrected Chapter 3.6 Power Pins (VDDC, VDDA, VDDCAUX to
Description
Initial Preliminary Datasheet
Add Chapter 3, 4 , 6 and 7
Fixed typo error on offset 06H, 20H, 22H, 24H, 26H and 28H of
EEPROM
Corrected pin function for the bit [6:0] offset B4h to Reserved in
section 7.2.53
Corrected register definition for offset A8h in section 7.2.48 and
offset ACh in section 7.2.49
Corrected register default value for the bit [2:1] offset B4h in section
7.2.52
Corrected register default value for the bit [18:16] offset 80h in
section 7.2.31
Corrected register definition for offset 100h in section 7.2.75
Corrected register description for offset F0h in section 7.2.70
Added 12.3 AC Specifications: Transmitter and Receiver
Specifications
Updated 8 Clock Scheme (Table 8-1)
Removed Reference Clock Output related info from Chapter 1
Features (advanced power saving), Chapter 3 Pin Description
(RREF_CO, REFCLK, VDDIO), Chapter 4 Pin Assignment
(RREF_CO to TEST6, REFCLK to NC, VDDIO to VDDR), Chapter
8 Clock Scheme (description).
Updated the Pericom Logo
Updated Chapter 13 Package Information
Corrected Chapter 4 PIN Assignment (PERP[4:0])
Added SMBus related items in Chapter 1 Features
Modified SMBus related pins (GPIO[5:7])
Added Disclaimer
Corrected Chapter 6. EEPROM and Chapter 7. Register Description
Corrected Chapter 3. Pin Description (PORTACT, TEST6) and
Chapter 4. Pin Assignment (A15, L12, N10, R10, T3, T10)
Updated Chapter 9. Hot Plug Operation
1.1V)
Added PWR_SAV (L7) pin in Chapter 3 and 4
Corrected Chapter 3 Pin Description (TXTERMADJ and
RXTERMADJ’s description, and DEQ’s default value)
Updated Chapter 3.5 JTAG Signals description
Updated Chapter 7.2.53 bit [15:0]
Remove VDDP, VDDAUX from Chapter 11 Power Management
and Chapter 12.1 Absolute Maximum Ratings
Revised Chapter 11 Power Management
Updated Chapter 3 Pin Description (PERP/PERN, PETP/PETN,
Page 3 of 81
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