CP2120-GM Silicon Laboratories Inc, CP2120-GM Datasheet - Page 12

• Manufacturer Part Number: CP2120-GM
• Description: IC I/O EXPANDER I2C/SPI 8B 20QFN
• Manufacturer: Silicon Laboratories Inc
• Type: SPI to I2C Bridger

Specifications of CP2120-GM

• Package / Case: 20-QFN
• Interface: I²C, SPI
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1324

CP2120
5.5. I
If the SPI Master attempts to transmit a command to the CP2120 while the I
disable its slave response. If an I
CP2120 will not ACK the address defined in the I2CADR Internal Register.
If the SPI Master attempts to transmit a command to the CP2120 while the CP2120 is acting as the Master on the
I
command. For instance, if the SPI Master calls the Read Internal Register command while the CP2120 is in the
middle of an I
Register command.
12
2
C bus, the CP2120 will suspend I
Slave Mode Timing
T
T
T
T
T
T
T
T
T
T
*Note: T
SE
SD
SEZ
SDZ
CKH
CKL
SIS
SIH
SOH
SLH
2
C Activity During SPI Transactions
2
SYSCLK
C transaction, that I
NSS Falling to First SCLK Edge
Last SCLK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High-Z
SCLK High Time
SCLK Low Time
MOSI Valid to SCLK Sample Edge
SCLK Sample Edge to MOSI Change
SCLK Shift Edge to MISO Change
Last SCLK Edge to MISO Change
(CKPHA = 1 ONLY)
equals 24.5 MHz.
*
(See Figure 4)
2
C Master device on the bus attempts to address the CP2120 during this time, the
2
Table 4. SPI Slave Timing Parameters
C transaction will stall until the CP2120 completely processes the Read Internal
2
C bus activity until the SPI Master has completed transmission of the
Rev. 0.4
2 x T
2 x T
5 x T
5 x T
2 x T
2 x T
6 x T
—
—
—
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
2
C bus is inactive, the CP2120 will
4 x T
4 x T
4 x T
8 x T
—
—
SYSCLK
SYSCLK
—
—
—
—
SYSCLK
SYSCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns