CP2120-GM Silicon Laboratories Inc, CP2120-GM Datasheet - Page 10

IC I/O EXPANDER I2C/SPI 8B 20QFN

CP2120-GM

Manufacturer Part Number
CP2120-GM
Description
IC I/O EXPANDER I2C/SPI 8B 20QFN
Manufacturer
Silicon Laboratories Inc
Type
SPI to I2C Bridger
Datasheets

Specifications of CP2120-GM

Package / Case
20-QFN
Interface
I²C, SPI
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1324

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2120-GM
Manufacturer:
AMS
Quantity:
195
Part Number:
CP2120-GMR
Manufacturer:
PANASONIC
Quantity:
12 500
CP2120
5.1. Command Set
An SPI Master controls the CP2120 by sending commands across the SPI bus. Some commands initiate I
transactions, while other commands modify or monitor CP2120 operation and events.
5.2. Internal Registers
The CP2120 maintains a set of internal registers that can be modified to configure general purpose port I/O and I
operation and can be read to obtain device status. Commands reading to and writing from the internal registers can
be issued at any time, even while an I
Table 3 shows a list of all internal registers.
5.2.1. Write to Internal Register
A Write to Internal Register command updates the value of one of the CP2120's Internal Registers. A Write to
Internal Register command begins with the command byte, 0x20, followed by the internal register address,
followed by the new value of the internal register. Only one register can be accessed per Write to Internal Register
command.
10
SPI Master
Internal Register
Table 3. Internal Register Addresses
IOCONFIG2
COMMAND
IOCONFIG
I2CCLOCK
2
EDGEINT
IOSTATE
I2CSTAT
RXBUFF
C transaction is in progress, as they do not initiate any I
I2CADR
I2CTO2
I2CTO
0x20
Rev. 0.4
Address
REGISTER
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
X
Section
6.1
6.1
6.2
6.1
6.3
6.1
7.
7.
7.
7.
DATA BYTE
2
C bus transactions.
2
2
C
C

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