PCA9575PW2,118 NXP Semiconductors, PCA9575PW2,118 Datasheet - Page 11
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PCA9575PW2,118
Manufacturer Part Number
PCA9575PW2,118
Description
IC I2C/SMBUS 16BIT GPIO 28-TSSOP
Manufacturer
NXP Semiconductors
Series
-r
Datasheet
1.PCA9575HF118.pdf
(38 pages)
Specifications of PCA9575PW2,118
Interface
I²C, SMBus
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
1.1 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Includes
POR
Description/function
16-bit I2C-bus and SMBus
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.1 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935286414118
NXP Semiconductors
PCA9575_3
Product data sheet
7.6.2 Register 1 - Input port 1 register
7.6.3 Register 2 - Polarity inversion port 0 register
This register is read-only. It reflects the incoming logic levels of the pins, regardless of
whether the pin is defined as an input or an output by the Configuration register. Writes to
this register will be acknowledged but will have no effect.
The default ‘X’ is determined by the externally applied logic level.
Table 5.
This register allows the user to invert the polarity of the Input port register data. If a bit in
this register is set (written with ‘1’), the corresponding Input port data is inverted. If a bit in
this register is cleared (written with a ‘0’), the Input port data polarity is retained.
Table 6.
Legend: * default value.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Symbol
N0.7
N0.6
N0.5
N0.4
N0.3
N0.2
N0.1
N0.0
Symbol
IO1.7
IO1.6
IO1.5
IO1.4
IO1.3
IO1.2
IO1.1
IO1.0
Register 1 - Input port 1 register (address 01h) bit description
Register 2 - Polarity Inversion port 0 register (address 02h) bit description
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access
read only
read only
read only
read only
read only
read only
read only
read only
Rev. 03 — 9 November 2009
16-bit I
Value
0*
0*
0*
0*
0*
0*
0*
0*
2
Value
X
X
X
X
X
X
X
X
C-bus and SMBus, level translating, low voltage GPIO
Description
inverts polarity of Input port 0 register data
0 = Input port 0 register data retained (default value)
1 = Input port 0 register data inverted
Description
determined by externally applied logic level
PCA9575
© NXP B.V. 2009. All rights reserved.
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