PCA9501D,112 NXP Semiconductors, PCA9501D,112 Datasheet - Page 17

• Manufacturer Part Number: PCA9501D,112
• Description: IC I/O EXPANDER I2C 8B 20SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9501D,112

• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Includes: EEPROM
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3353-5; 935272364112; PCA9501D

NXP Semiconductors
12. Dynamic characteristics
Table 6.
[1]
[2]
[3]
Table 7.
PCA9501_4
Product data sheet
Symbol
I
f
t
t
t
t
t
t
t
t
t
t
Port timing
t
t
t
Interrupt timing
t
t
Power-up timing
t
t
Write cycle limits (see
T
Parameter
memory cell data retention
number of memory cell write cycles
2
SCL
SP
BUF
SU;STA
HD;STA
r
f
SU;DAT
HD;DAT
VD;DAT
SU;STO
v(Q)
su(D)
h(D)
v(INT)
rst(INT)
pu(R)
pu(W)
cy(W)
C-bus timing
All the timing values are valid within the operating supply voltage and ambient temperature range and refer to V
voltage swing of V
t
guaranteed by design.
T
pu(R)
cy(W)
and t
is the maximum time that the device requires to perform the internal write operation.
Dynamic characteristics
Non-volatile storage specifications
pu(W)
Parameter
SCL clock frequency
pulse width of spikes that must be
suppressed by the input filter
bus free time between a STOP and START
condition
set-up time for a repeated START condition
hold time (repeated) START condition
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
data set-up time
data hold time
data valid time
set-up time for STOP condition
data output valid time
data input set-up time
data input hold time
valid time on pin INT
reset time on pin INT
read power-up time
write power-up time
write cycle time
[1]
(see
are the delays required from the time V
SS
to V
Figure
Figure
DD
.
24)
25)
Rev. 04 — 10 February 2009
8-bit I
DD
2
is stable until the specified operation can be initiated. These parameters are
C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
Specification
10 years minimum
100,000 cycles minimum
Conditions
SCL LOW to
data output
C
C
C
C
C
L
L
L
L
L
100 pF
100 pF
100 pF
100 pF
100 pF
[2]
[2]
[3]
Min
-
-
1.3
0.6
0.6
-
-
250
0
-
0.6
-
0
4
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
PCA9501
IL
© NXP B.V. 2009. All rights reserved.
Max
400
50
-
-
-
0.3
0.3
-
-
1.0
-
4
-
-
4
4
1
5
10
and V
IH
with an input
Unit
kHz
ns
ns
ns
ms
ms
ms
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