MCIMX534AVV8C Freescale Semiconductor, MCIMX534AVV8C Datasheet - Page 67

• Manufacturer Part Number: MCIMX534AVV8C
• Description: IC, 32-BIT MPU, 800 MHz, 529-BGA
• Manufacturer: Freescale Semiconductor
• Series: ARM Cortex-A8r

Specifications of MCIMX534AVV8C

• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 800MHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 0.8V To 1.15V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

1
4.7
The following subsections provide information on external peripheral interfaces.
4.7.1
The AUDMUX provides a programmable interconnect logic for voice, audio and data routing between
internal serial interfaces (SSIs) and external serial interfaces (audio and voice codecs). The AC timing of
AUDMUX external pins is governed by the SSI module. For more information, see the respective SSI
electrical specifications found within this document.
4.7.2
This section describes the timing parameters of the CSPI and ECSPI blocks. The CSPI and ECSPI have
separate timing parameters for master and slave modes. The nomenclature used with the CSPI / ECSPI
modules and the respective routing of these signals is shown in
Freescale Semiconductor
DDR26(LP
To receive the reported setup and hold values, read calibration should be performed in order to locate the DQS in the middle
of DQ window.
DDR26
DDR27
DDR2)
ID
DQS (input)
DQ (input)
SDCLK_B
SDCLK
External Peripheral Interfaces Parameters
AUDMUX Timing Parameters
CSPI and ECSPI Timing Parameters
Minimum required DQ valid window width
except from LPDDR2
Minimum required DQ valid window width
for LPDDR2
DQS to DQ valid data
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 3
Figure 31. DDR SDRAM DQ vs. DQS and SDCLK Read Cycle
DDR27
Table 43. DDR SDRAM Read Cycle
Parameter
DATA
DDR26
DATA
DATA
DATA
Table
DATA
1
44.
Symbol
—
—
—
DATA
SDCLK = 400 MHz
0.425
0.275
Min
0.6
Electrical Characteristics
DATA
0.475
Max
—
—
DATA
Unit
ns
ns
ns
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