PCA9698DGG,512 NXP Semiconductors, PCA9698DGG,512 Datasheet - Page 7

IC I/O EXPANDER I2C 40B 56TSSOP

PCA9698DGG,512

Manufacturer Part Number
PCA9698DGG,512
Description
IC I/O EXPANDER I2C 40B 56TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9698DGG,512

Package / Case
56-TSSOP
Interface
I²C
Number Of I /o
40
Interrupt Output
Yes
Frequency - Clock
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9698
Number Of Lines (input / Output)
40.0 / 40.0
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
500 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5.5 V
Logic Type
I2C Bus
Maximum Clock Frequency
1 MHz
Mounting Style
SMD/SMT
Number Of Input Lines
40.0
Number Of Output Lines
40.0
Output Current
50 mA
Output Voltage
5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM6281 - DAUGHTER CARD PCA9698 FOR OM6275
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3241-5
935278614512
PCA9698DGG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9698DGG,512
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
7. Functional description
PCA9698
Product data sheet
7.1 Device address
Table 2.
[1]
Refer to
Following a START condition the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9698 is shown in
64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on
AD2, AD1 and AD0. Address values depending on AD2, AD1 and AD0 can be found in
Table 12 “PCA9698 address
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected while a logic 0 selects a write operation.
Symbol
AD2
OE
INT/SMBALERT
RESET
Fig 5.
HVQFN56 package die supply ground is connected to both V
must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board and for proper heat conduction through the board, thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
Figure 1 “Block diagram of
PCA9698 device address
Pin description
All information provided in this document is subject to legal disclaimers.
Pin
TSSOP56
29
30
55
56
Figure
40-bit Fm+ I
Rev. 3 — 3 August 2010
…continued
map”.
5. Slave address pins AD2, AD1 and AD0 choose 1 of
A6
HVQFN56
22
23
48
49
A5
2
PCA9698”.
C-bus advanced I/O port with RESET, OE and INT
programmable
slave address
A4
A3
A2
Type
input
input
output
input
A1
SS
002aab937
A0
pins and exposed center pad. V
R/W
Description
address input 2
active LOW output enable
active LOW interrupt output/
active LOW SMBus alert
output
active LOW reset input
PCA9698
© NXP B.V. 2010. All rights reserved.
SS
pins
7 of 48

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