STA016AP STMicroelectronics, STA016AP Datasheet - Page 19

• Manufacturer Part Number: STA016AP
• Description: DECODER AUDIO MPEG 2.5 64-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Decoderr

Specifications of STA016AP

• Applications: Multimedia
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Voltage - Supply, Digital: -

the output crossbar according following table
Table 13. .
6.5 GPSO_CONFIGURATION registers
6.5.1
Address : 0x66 (102)
Type : RW - DEC
Software Reset : 0
Description
Table 14. :
Note that embedded default configuration for GPSO
can be retrieved by user thanks to following setting :
Note that embedded default configuration for PCM
block is described at previous chapter.
CR1
Bit fields
b7
X
– GPSO_CONF = b00000011;
0
0
1
1
OC0
OC1
OC2
description
CR0
OUTPUT_CONF :
b6
X
0
1
0
1
Configuration of gpso :
0 : take embedded default configuration.
1 : configure gpso from register
GPSO_CONF.
Use of block PCM to generate clocks
(PCMCK, LRCK & BCK):
0 : no use.
1 : use it.
Configuration of PCM block:
0 : take embedded default configuration.
1 : configure PCM block from PCM_DIV
& PCM_CONF registers.
Left channel is mapped on the left
output.
Right channel is mapped on the right
output.
Left channel is duplicated on both output
channels.
Right channel is duplicated on both
output channels.
Right and left channels are toggled.
b5
X
b4
X
Comment
Comment
b3
X
0C2
b2
OC1
b1
OC0
b0
6.5.2
Address : 0x6A (106)
Type : RW - DEC
Software Reset : 0
Description :
If OUTPUT_CONF == 1, this register configure the
GPSO interface
Table 15. .
6.6 I
6.6.1
Address : 0x5A (90)
Type : RW - DEC
Software Reset : 0
Description :
If set to 1 enable the configurability of the I2Sin Input
thanks to following registers, else disable this config-
urability and take embedded default configuration for
I2Sin registers.
Note that this embedded default configuration can be
retrieved by user thanks to following setting :
CF7
CF[7:2]
b7
b7
fields
– I_AUDIO_CONFIG_1 = b00000110;
– I_AUDIO_CONFIG_2 = b11100000;
– I_AUDIO_CONFIG_3 = b00000001;
CF0
CF1
Bit
description
2
Sin_CONFIGURATION registers
CF6
GPSO_CONF :
INPUT_CONF :
b6
b6
Polarity of GPSO_CK :
0 : data provided on rising edge & stable on
falling edge
1 : data provided on falling edge & stable on
rising edge
Polarity of GPSO_REQ :
0 : data are valid when GPSO_REQ is high
1 : data are valid when GPSO_REQ is low
Reserved : to be set to 0.
CF5
b5
b5
CF4
b4
b4
Comment
CF3
b3
b3
CF2
b2
b2
STA016A
CF1
b1
b1
CF0
19/43
b0
b0