SAA7134HL/V1,557 NXP Semiconductors, SAA7134HL/V1,557 Datasheet - Page 33

IC AUD/VID DECODER PCI 128LQFP

SAA7134HL/V1,557

Manufacturer Part Number
SAA7134HL/V1,557
Description
IC AUD/VID DECODER PCI 128LQFP
Manufacturer
NXP Semiconductors
Type
Video Decoderr
Datasheet

Specifications of SAA7134HL/V1,557

Package / Case
128-LQFP
Applications
TV
Voltage - Supply, Analog
3 V ~ 3.6 V
Voltage - Supply, Digital
3 V ~ 3.6 V
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935269247557
SAA7134HLBE
SAA7134HLBE

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7134HL/V1,557
Manufacturer:
Sigma Designs Inc
Quantity:
10 000
Philips Semiconductors
7. Limiting values
SAA7134HL_4
Product data sheet
6.9.2 Propagate reset
6.9.3 GPIO
The PCI system reset and ACPI power management state D3 is propagated to peripheral
devices by the dedicated pin PROP_RST_N. This signal is switched to active LOW by
reset and D3, and is only switched HIGH under control of the device driver ‘by will’. The
intention is that peripheral devices will use signal PROP_RST_N as Chip-Enable (CE).
The peripheral devices should enter a low power consumption state if
pin PROP_RST_N = LOW, and reset into default setting at the rising edge.
The SAA7134HL offers a set of General Purpose Input/Output (GPIO) pins, to interface to
on-board peripheral circuits. These GPIOs are intended to take over dedicated functions:
Any GPIO pin that is not used for a dedicated function is available for direct read and write
access via the PCI-bus. Any GPIO pin can be selected individually as input or output
(masked write). By these means, very tailored interfacing to peripheral devices can be
created via the SAA7134HL capture driver running on Windows operating systems.
At system reset (PCI reset) all GPIO pins will be set to 3-state and input, and the logic
level present on the GPIO pins at that moment will be saved into a special ‘strap’ register.
All GPIO pins have an internal pull-down resistor (LOW-level), but can be strapped
externally with a 4.7 k resistor to the supply voltage (HIGH-level). The device driver can
investigate the strap register for information about the hardware configuration of a given
board.
Table 17:
In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins connected
together and grounded (0 V); all supply pins connected together.
Symbol Parameter
V
V
V
V
V
T
V
stg
DDD
DDA
IA
I(n)
ID
SS
Digital video port output: 8-bit or 16-bit wide (including raw DTV)
Digital audio serial output: i.e. I
Transport stream input: parallel or serial (also applicable as I
Peripheral interrupt input: four GPIO pins of the SAA7134HL can be enabled to raise
an interrupt on the PCI-bus. By this means, peripheral devices can directly intercept
with the device driver on changed status or error conditions
digital supply voltage
analog supply voltage
voltage difference between
pins V
input voltage at analog
inputs
input voltage at pins XTALI,
SDA and SCL
input voltage at digital I/O
stages
storage temperature
Limiting values
SSA
and V
Rev. 04 — 31 March 2006
SSD
2
Conditions
outputs in 3-state
outputs in 3-state;
3.0 V < V
S-bus output
DDD
PCI audio and video broadcast decoder
< 3.6 V
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
SAA7134HL
2
Min
-
S-bus input)
0.5
0.5
0.5
0.5
0.5
0.5
65
Max
+4.6
+4.6
100
+4.6
V
+4.6
+5.5
+150
DDD
+ 0.5 V
33 of 51
Unit
V
V
mV
V
V
V
C

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