SAA7134HL/V1,557 NXP Semiconductors, SAA7134HL/V1,557 Datasheet - Page 32

• Manufacturer Part Number: SAA7134HL/V1,557
• Description: IC AUD/VID DECODER PCI 128LQFP
• Manufacturer: NXP Semiconductors
• Type: Video Decoderr

Specifications of SAA7134HL/V1,557

• Package / Case: 128-LQFP
• Applications: TV
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935269247557; SAA7134HLBE; SAA7134HLBE

Philips Semiconductors
SAA7134HL_4
Product data sheet
6.7.2 Analog audio pass-through and loop back cable
6.9.1 I
6.8 DTV/DVB channel decoding and TS capture
6.9 Control of peripheral devices
Most operating systems are prepared to deal with audio input at only one single entry
point, namely at the sound card function. Therefore the sound associated with video has
to get routed through the sound card.
The SAA7134HL supports analog audio pass-through and the loop back cable on-chip.
No external components are required. The audio signal, that was otherwise connected to
the sound card line-in, e.g. analog sound from a CD-ROM drive, has to be connected to
one of the inputs of the SAA7134HL. By default, after a system reset and without
involvement of any driver, this audio signal is passed through to the analog audio output
pins, that will feed the loop back cable to the sound card line-in connector. The AV capture
driver has to open the default pass-through and switch in the TV sound signal by will.
The SAA7134HL is optimally equipped to support the application extension to capture
digital TV signals, e.g. for VSB (ATSC) or DVB (T/C/S). A hybrid TV tuner for analog and
digital TV broadcast reception usually provides a DTV signal on low IF, i.e. downconverted
into a frequency range from 0 MHz to 10 MHz. Such signals can be fed to one of the
5 video inputs of the SAA7134HL for digitizing. The digital raw DTV is output at the video
port, and is sent to the peripheral channel decoder, e.g. TDA8961 for VSB-8 decoding.
The channel decoder provides the sampling clock via the external clock input
pin X_CLK_IN (up to 36 MHz input clock frequency), and adjusts the signal gain in the
tuner or in the video input path in front of the ADC. Alternatively, the low IF DTV/DVB
signal could be fed directly to the channel decoder, depending on the capability for
digitizing the selected device.
The peripheral channel decoder circuitry decodes the digital transmission into bits and
bytes, apply error correction etc. and outputs a packed Transport Stream (TS)
accompanied by a clock and handshake signals. The SAA7134HL captures the TS in
parallel or serial protocol, synchronized by Start Of Packet (SOP), and pumps it via the
dedicated DMA into the PCI memory space. The DMA definition supports automatic
toggling between two buffers.
The SAA7134HL incorporates an I
such as tuner, DTV/DVB channel decoder, audio DSP co-processors, etc. The I
interface itself is controlled from the PCI-bus on a command level, reading and writing
byte by byte. The actual I
raise error interrupts on the PCI-bus.
At PCI reset time, the I
on-board EEPROM to update the PCI configuration registers.
The I
allows application of the device in the stand-alone mode, i.e. with the PCI-bus not
connected. Under the slave mode, all internal programming registers can be reached via
the I
2
C-bus master
2
2
C-bus with exception of the PCI configuration space.
C-bus interface is multi-master capable and can assume slave operation too. This
2
Rev. 04 — 31 March 2006
C-bus master receives board specific information from the
2
C-bus status is reported (status register) and, as an option, can
2
C-bus master to setup and control peripheral devices
PCI audio and video broadcast decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
SAA7134HL
2
C-bus
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