ADV7391BCPZ Analog Devices Inc, ADV7391BCPZ Datasheet - Page 98

IC ENCODER VIDEO W/DAC 32-LFCSP

ADV7391BCPZ

Manufacturer Part Number
ADV7391BCPZ
Description
IC ENCODER VIDEO W/DAC 32-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7391BCPZ

Applications
Set-Top Boxes, Video Players, Displays
Voltage - Supply, Analog
2.6 V ~ 3.46 V
Voltage - Supply, Digital
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Supply Voltage Range
1.71V To 1.89V
Operating Temperature Range
-40°C To +85°C
Tv / Video Case Style
LFCSP
No. Of Pins
32
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
85°C
Operating
RoHS Compliant
Input Format
Digital
Output Format
Analogue
Dac Resolution
10bit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADV7391EBZ - BOARD EVAL FOR ADV7391 ENCODER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADV7390/ADV7391/ADV7392/ADV7393
Table 97. 8-Bit PAL Square Pixel YCrCb In (EAV/SAV),
CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x8C
0x8D
0x8E
0x8F
Setting
0x02
0x1C
0x10
0x00
0x11
0xD3
0x0C
0x8C
0x79
0x26
Description
Software reset.
All DACs enabled. PLL enabled (16×).
WLCSP required.
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled. Square
pixel mode enabled.
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL square pixel mode (29.5 MHz
input clock).
Rev. B | Page 98 of 108
Table 98. 16-Bit PAL Square Pixel RGB In, CVBS/Y-C Out
Subaddress
0x17
0x00
0x01
0x80
0x82
0x87
0x88
0x8A
0x8C
0x8D
0x8E
0x8F
0x02
0x1C
0x00
0x11
0xD3
0x80
0x10
0x0C
0x0C
0x8C
0x79
0x26
Setting
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled. Square
pixel mode enabled.
RGB input enabled.
16-bit RGB input enabled.
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL square pixel mode (29.5 MHz
input clock).

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