SFPA8192Q1BO2TO-I-QT-223-STD Swissbit NA Inc, SFPA8192Q1BO2TO-I-QT-223-STD Datasheet - Page 59

• Manufacturer Part Number: SFPA8192Q1BO2TO-I-QT-223-STD
• Description: FLASH SSD SMART UDMA 2.5" 8GB
• Manufacturer: Swissbit NA Inc
• Series: P-120r

Specifications of SFPA8192Q1BO2TO-I-QT-223-STD

• Memory Size: 8GB
• Memory Type: FLASH
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 1052-1025

8.35 Wear Level (F5h)
This command is effectively a NOP command and only implemented for backward compatibility. The Sector
Count Register will always be returned with a ‘00h’ indicating Wear Level is not needed.
defines the Wear Level command Byte sequence.
Table 78: Wear level
8.36 Write Buffer (E8h)
The Write Buffer command enables the host to overwrite contents of the Drive’s sector buffer with any data
pattern desired. This command has the same protocol as the Write Sector(s) command and transfers 512
Bytes.
Table 79 defines the Write Buffer command Byte sequence.
Table 79: Write Buffer
8.37 Write DMA (CAh)
This command uses DMA mode to write from 1 to 256 sectors as specified in the Sector Count register. A
sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number
Register. When this command is issued the Drive sets BSY, puts all or part of the sector of data in the buffer.
The Drive is then permitted, although not required, to set DRQ, clear BSY. The Drive asserts DMAREQ while
data is available to be transferred. The host then writes the (512 * sector-count) bytes of data to the Drive
using DMA. While DMAREQ is asserted by the Drive, the Host asserts -DMACK while it is ready to transfer data
by DMA and asserts -IOWR once for each 16 bit word to be transferred from the Host.
Interrupts are not generated on every sector, but upon completion of the transfer of the entire number of
sectors to be transferred or upon the occurrence of an unrecoverable error. At command completion, the
Command Block Registers contain the cylinder, head and sector number of the last sector written. If an
error occurs, the write terminates at the sector where the error occurred. The Command Block Registers
contain the cylinder, head, and sector number of the sector where the error occurred. The amount of data
transferred is indeterminate.
When a Write DMA command is received by the Drive and 8 bit transfer mode has been enabled
by the Set Features command, the Drive shall return the Aborted error.
Table 80: Write DMA
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
Task File Register
Task File Register
Task File Register
CYLINDER LOW
SECTOR COUNT
CYLINDER LOW
CYLINDER LOW
CYLINDER HI
SECTOR NUM
SECTOR COUNT
SECTOR COUNT
DRIVE/HEAD
SECTOR NUM
SECTOR NUM
COMMAND
CYLINDER HI
CYLINDER HI
DRIVE/HEAD
DRIVE/HEAD
FEATURES
COMMAND
COMMAND
FEATURES
FEATURES
Swissbit reserves the right to change products or specifications without notice.
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[e-mail]
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Cylinder High (LBA23-16)
Sector number (LBA7-0)
Cylinder Low (LBA15-8)
Completion Status
Sector Count
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F5h
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