LFE2M50SE-7FN900C Lattice, LFE2M50SE-7FN900C Datasheet - Page 8
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2M50SE-7FN900C
Manufacturer Part Number
LFE2M50SE-7FN900C
Description
FPGA - Field Programmable Gate Array 48K LUTs 410 S Ser Memory DSP 1.2V 7SPD
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M50SE-7FN900C
Number Of Macrocells
48000
Number Of Programmable I/os
410
Data Ram Size
4246528
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-900
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M50SE-7FN900C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 8 of 385
- Download datasheet (3Mb)
Lattice Semiconductor
Modes of Operation
Each slice has up to four potential modes of operation: Logic, Ripple, RAM and ROM.
Logic Mode
In this mode, the LUTs in each slice are configured as 4-input combinatorial lookup tables. A LUT4 can have 16
possible input combinations. Any four input logic functions can be generated by programming this lookup table.
Since there are two LUT4s per slice, a LUT5 can be constructed within one slice. Larger look-up tables such as
LUT6, LUT7 and LUT8 can be constructed by concatenating other slices. Note LUT8 requires more than four
slices.
Ripple Mode
Ripple mode supports the efficient implementation of small arithmetic functions. In ripple mode, the following func-
tions can be implemented by each slice:
• Addition 2-bit
• Subtraction 2-bit
• Add/Subtract 2-bit using dynamic control
• Up counter 2-bit
• Down counter 2-bit
• Up/Down counter with Async clear
• Up/Down counter with preload (sync)
• Ripple mode multiplier building block
• Multiplier support
• Comparator functions of A and B inputs
Ripple Mode includes an optional configuration that performs arithmetic using fast carry chain methods. In this con-
figuration (also referred to as CCU2 mode) two additional signals, Carry Generate and Carry Propagate, are gener-
ated on a per slice basis to allow fast arithmetic functions to be constructed by concatenating Slices.
RAM Mode
In this mode, a 16x4-bit distributed single port RAM (SPR) can be constructed using each LUT block in Slice 0 and
Slice 2 as a 16x1-bit memory. Slice 1 is used to provide memory address and control signals. A 16x2-bit pseudo
dual port RAM (PDPR) memory is created by using one Slice as the read-write port and the other companion slice
as the read-only port.
The Lattice design tools support the creation of a variety of different size memories. Where appropriate, the soft-
ware will construct these using distributed memory primitives that represent the capabilities of the PFU. Table 2-3
shows the number of slices required to implement different distributed RAM primitives. For more information about
using RAM in LatticeECP2/M devices, please see the list of additional technical documentation at the end of this
data sheet.
Table 2-3. Number of Slices Required to Implement Distributed RAM
– A greater-than-or-equal-to B
– A not-equal-to B
– A less-than-or-equal-to B
Number of slices
Note: SPR = Single Port RAM, PDPR = Pseudo Dual Port RAM
SPR 16X4
2-5
3
LatticeECP2/M Family Data Sheet
PDPR 16X4
3
Architecture
Related parts for LFE2M50SE-7FN900C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFE2M50SE-6FN484I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeECP2M Family 48000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFE2M50SE-6FN672I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeECP2M Family 48000 Cells 90nm (CMOS) Technology 1.2V 672-Pin FBGA
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFE2M50SE-5FN672C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeECP2M Family 48000 Cells 90nm (CMOS) Technology 1.2V 672-Pin FBGA
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFE2M50SE-5FN484C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 50KLUTS 270I/O 484-BGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-5F672C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 50KLUTS 372I/O 672-BGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-7F484C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 50KLUTS 270I/O 484-BGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-7FN672C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 50KLUTS 372I/O 672-BGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-6FN900I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 50KLUTS 410I/O 900-BGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-5FN484I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 48KLUTS 484FPBGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-5FN900C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 48KLUTS 900FPBGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-6FN672C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 48KLUTS 672FPBGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-5FN672I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 48KLUTS 672FPBGA
Manufacturer:
Lattice
Datasheet:
![LFE2M50SE-5FN900I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 48KLUTS 900FPBGA
Manufacturer:
Lattice
Datasheet: