LFE2M50SE-7FN900C Lattice, LFE2M50SE-7FN900C Datasheet - Page 247
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2M50SE-7FN900C
Manufacturer Part Number
LFE2M50SE-7FN900C
Description
FPGA - Field Programmable Gate Array 48K LUTs 410 S Ser Memory DSP 1.2V 7SPD
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M50SE-7FN900C
Number Of Macrocells
48000
Number Of Programmable I/os
410
Data Ram Size
4246528
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-900
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M50SE-7FN900C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LFE2M20E/SE and LFE2M35E/SE Logic Signal Connections: 484 fpBGA
Number
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
Ball
H22
H21
H16
H17
G22
G21
H20
H19
G16
H18
G20
G17
D22
D20
D19
D18
C22
K18
F22
F21
F20
F17
E22
E20
E19
F18
F19
E18
F16
A21
J16
J22
J21
J17
J18
J20
J19
-
-
URC_SQ_VCCRX0
URC_SQ_HDINP0
Function
Ball/Pad
GNDIO2
GNDIO2
GNDIO2
GNDIO2
GNDIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
PR28B
PR28A
PR27B
PR27A
PR25B
PR25A
PR24B
PR24A
PR23B
PR23A
PR22B
PR22A
PR21B
PR21A
PR20B
PR20A
PR19B
PR19A
PR18B
PR18A
PR16B
PR16A
PR15B
PR15A
PR14B
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
PR9B
PR9A
XRES
-
-
Bank
LFE2M20E/SE
12
12
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
-
-
-
-
RUM1_SPLLC_FB_A/RDQ22
RUM1_SPLLT_FB_A/RDQ22
RUM1_SPLLC_IN_A/RDQ22
RUM1_SPLLT_IN_A/RDQ22
RUM0_SPLLC_FB_A
RUM0_SPLLT_FB_A
RUM0_SPLLC_IN_A
RUM0_SPLLT_IN_A
PCLKC2_0/RDQ22
PCLKT2_0/RDQ22
Dual Function
PCLKC3_0
PCLKT3_0
VREF2_3
VREF1_3
VREF2_2
VREF1_2
RDQS22
RDQ22
RDQ22
RDQ22
RDQ22
RDQ22
RDQ22
RDQ22
RDQ22
RDQ22
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
T
4-147
URC_SQ_VCCRX0
URC_SQ_HDINP0
Function
Ball/Pad
GNDIO2
GNDIO2
GNDIO2
GNDIO2
GNDIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
PR38B
PR38A
PR37B
PR37A
PR35B
PR35A
PR34B
PR34A
PR33B
PR33A
PR32B
PR32A
PR31B
PR31A
PR30B
PR30A
PR29B
PR29A
PR28B
PR28A
PR26B
PR26A
PR25B
PR25A
PR14B
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
XRES
PR9B
PR9A
-
-
-
LatticeECP2/M Family Data Sheet
Bank
12
12
2
2
2
2
2
2
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
-
-
-
-
-
LFE2M35E/SE
RUM1_SPLLC_FB_A/RDQ32
RUM0_SPLLC_FB_A/RDQ15
RUM1_SPLLT_FB_A/RDQ32
RUM1_SPLLC_IN_A/RDQ32
RUM0_SPLLT_FB_A/RDQ15
RUM0_SPLLC_IN_A/RDQ15
RUM1_SPLLT_IN_A/RDQ32
RUM0_SPLLT_IN_A/RDQ15
PCLKC2_0/RDQ32
PCLKT2_0/RDQ32
Dual Function
PCLKC3_0
PCLKT3_0
VREF2_3
VREF1_3
VREF2_2
VREF1_2
RDQS32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ23
RDQ23
RDQ23
RDQ23
RDQ15
RDQ15
RDQ15
RDQ15
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
T
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