LFEC6E-5FN484C Lattice, LFEC6E-5FN484C Datasheet - Page 44

• Manufacturer Part Number: LFEC6E-5FN484C
• Description: FPGA - Field Programmable Gate Array 6.1 LUT 224 I/O
• Manufacturer: Lattice

Specifications of LFEC6E-5FN484C

• Number Of Gates: 6100
• Number Of Logic Blocks: 768
• Number Of Macrocells: 6100
• Maximum Operating Frequency: 420 MHz
• Number Of Programmable I/os: 224
• Data Ram Size: 94208
• Delay Time: 5 ns
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: FPBGA-484
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: *
• Number Of I /o: *
• Voltage - Supply: *
• Mounting Type: *
• Operating Temperature: *
• Lead Free Status / Rohs Status: Details

Lattice Semiconductor
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
LVDS25E
The top and bottom side of LatticeECP/EC devices support LVDS outputs via emulated complementary LVCMOS
outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in
Figure 3-1 is one possible solution for point-to-point signals.
Figure 3-1. LVDS25E Output Termination Example
Table 3-1. LVDS25E DC Conditions
VCCIO = 2.5V (±5%)
VCCIO = 2.5V (±5%)
V
V
V
V
Z
OH
OL
OD
BACK
CM
Parameter
ON-chip
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
OFF-chip
CAT16-LV4F12
RS=165 ohms
(±1%)
RS=165 ohms
(±1%)
Bourns
Transmission line, Zo = 100 ohm differential
Description
RD = 140 ohms
(±1%)
3-8
DC and Switching Characteristics
Typical
LatticeECP/EC Family Data Sheet
RD = 100 ohms
(±1%)
1.42
1.08
0.35
1.25
100
OFF-chip ON-chip
Units
V
V
V
V
Ω
+
-