M29W320DT90N6 Micron Technology Inc, M29W320DT90N6 Datasheet - Page 18

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M29W320DT90N6

Manufacturer Part Number
M29W320DT90N6
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29W320DT90N6

Cell Type
NOR
Density
32Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Top
Address Bus
22/21Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6/12V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
4M/2M
Supply Current
10mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

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4.3
4.4
4.5
18/56
Read CFI Query command
The Read CFI Query Command is used to read data from the Common Flash Interface
(CFI) Memory Area. This command is valid when the device is in the Read Array mode, or
when the device is in Autoselected mode.
One Bus Write cycle is required to issue the Read CFI Query Command. Once the
command is issued subsequent Bus Read operations read from the Common Flash
Interface Memory Area.
The Read/Reset command must be issued to return the device to the previous mode (the
Read Array mode or Autoselected mode). A second Read/Reset command would be
needed if the device is to be put in the Read Array mode from Autoselected mode.
See
Table 25
Interface (CFI) memory area.
Program command
The Program command can be used to program a value to one address in the memory
array at a time. The command requires four Bus Write operations, the final write operation
latches the address and data in the internal state machine and starts the Program/Erase
Controller.
If the address falls in a protected block then the Program command is ignored, the data
remains unchanged. The Status Register is never read and no error condition is given.
During the program operation the memory will ignore all commands. It is not possible to
issue any command to abort or pause the operation. Typical program times are given in
Table
on the Data Inputs/Outputs. See the section on the Status Register for more details.
After the program operation has completed the memory will return to the Read mode, unless
an error has occurred. When an error occurs the memory will continue to output the Status
Register. A Read/Reset command must be issued to reset the error condition and return to
Read mode.
Note that the Program command cannot change a bit set at ’0’ back to ’1’. One of the Erase
Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’.
Unlock Bypass command
The Unlock Bypass command is used in conjunction with the Unlock Bypass Program
command to program the memory. When the cycle time to the device is long (as with some
EPROM programmers) considerable time saving can be made by using these commands.
Three Bus Write operations are required to issue the Unlock Bypass command.
Once the Unlock Bypass command has been issued the memory will only accept the Unlock
Bypass Program command and the Unlock Bypass Reset command. The memory can be
read as if in Read mode.
The memory offers accelerated program operations through the V
When the system asserts V
enters the Unlock Bypass mode. The system may then write the two-cycle Unlock Bypass
Appendix B: Common Flash Interface
6. Bus Read operations during the program operation will output the Status Register
and
Table 26
for details on the information contained in the Common Flash
PP
on the V
PP
/Write Protect pin, the memory automatically
(CFI),
Table
21,
Table
22,
PP
/Write Protect pin.
Table
23,
Table
24,

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