CP2110-F02-GM1 Silicon Laboratories Inc, CP2110-F02-GM1 Datasheet - Page 22

Peripheral Drivers & Components (PCIs) HID USB-UART bridge

CP2110-F02-GM1

Manufacturer Part Number
CP2110-F02-GM1
Description
Peripheral Drivers & Components (PCIs) HID USB-UART bridge
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CP2110-F02-GM1

Package / Case
QFN-28
Input Voltage Range (max)
5.25 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
12.5 mA
Lead Free Status / Rohs Status
 Details

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Part Number:
CP2110-F02-GM1
Manufacturer:
ST
Quantity:
6 700
CP2110
10. Voltage Regulator
The CP2110 includes an on-chip 5 to 3.45 V voltage regulator. This allows the CP2110 to be configured as either a
USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus-
powered application using the regulator is shown in Figure 11. When enabled, the voltage regulator output appears
on the V
characteristics. If the regulator is used to provide V
from Figure 11, but connect REGIN to an on-board 5 V supply, and disconnect it from the VBUS pin.
22
Connector
Note 1 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
Note 2 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
Note 3 : An external pull-up is not required, but can be added for noise immunity.
Note 4 : If programming the configuration ROM via USB, add a 4.7 F capacitor between VPP
USB
VBUS
GND
D+
DD
D-
3.45 V Power
pin and can be used to power external devices. See Table 5 for the voltage regulator electrical
voltage. VIO is internally connected to VDD on -GM1 packages.
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
and ground. During a programming operation, do not connect the VPP pin to other
circuitry, and ensure that VDD is at least 3.3 V.
1-5 F
Figure 11. Typical Bus-Powered Connection Diagram
Note 2
Note 1
0.1 F
1 F
VIO
VDD
REGIN
GND
VBUS
D+
D-
DD
Rev. 1.1
in a self-powered application, use the same connections
CP2110
GPIO.3_RS485
GPIO.1_RTS
GPIO.2_CTS
GPIO.5_RXT
GPIO.0_CLK
GPIO.4_TXT
SUSPEND
SUSPEND
GPIO.6
GPIO.7
GPIO.8
GPIO.9
RST
VPP
RX
TX
VIO
and GPIO
Standard
Suspend
Signals
Signals
4.7 F
UART
Note 3
Note 4
4.7 k

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