CP2110-F02-GM1 Silicon Laboratories Inc, CP2110-F02-GM1 Datasheet - Page 18

• Manufacturer Part Number: CP2110-F02-GM1
• Description: Peripheral Drivers & Components (PCIs) HID USB-UART bridge
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2110-F02-GM1

• Package / Case: QFN-28
• Input Voltage Range (max): 5.25 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 12.5 mA
• Lead Free Status / Rohs Status: Details

CP2110
8. GPIO Pins
The CP2110 supports 10 user-configurable GPIO pins. Each of these GPIO pins are usable as inputs, open-drain
outputs, or push-pull outputs. Six of these GPIO pins also have alternate functions which are listed in Table 13.
More information regarding the configuration and usage of these pins is available in “AN144: CP21xx
Customization Guide” available on the Silicon Labs website.
The default configuration for all of the GPIO pins is provided in Table 14. The configuration of the pins is one-time
programmable for each device. See Section 9 for more information about programming the GPIO pin functionality.
The difference between an open-drain output and a push-pull output is when the GPIO output is driven to logic
high. A logic high, open-drain output pulls the pin to the VIO rail through an internal, pull-up resistor. A logic high,
push-pull output directly connects the pin to the VIO voltage. Open-drain outputs are typically used when
interfacing to logic at a higher voltage than the VIO pin. These pins can be safely pulled to the higher, external
voltage through an external pull-up resistor. The maximum external pull-up voltage is 5 V.
The speed of reading and writing the GPIO pins is subject to the timing of the USB bus. GPIO pins configured as
inputs or outputs are not recommended for real-time signalling.
18
GPIO Pin
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
RS-485 Transceiver Control
Default Function
GPIO Input
TX Toggle
Table 14. GPIO Pin Default Configuration
RTS
CTS
Table 13. GPIO Pin Alternate Functions
GPIO Pin
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
GPIO.5
RS-485 Transceiver Control
Rev. 1.1
Alternate Function
CLK Output
RX Toggle
TX Toggle
CTS
RTS
GPIO Pin
GPIO.5
GPIO.6
GPIO.7
GPIO.8
GPIO.9
GPIO Push-Pull Output
GPIO Push-Pull Output
Default Function
GPIO Input
GPIO Input
RX Toggle