LPC11C24FBD48/301,151 NXP Semiconductors, LPC11C24FBD48/301,151 Datasheet - Page 27

Microcontrollers (MCU) CAN Transceiver MCU 32K Flash

LPC11C24FBD48/301,151

Manufacturer Part Number
LPC11C24FBD48/301,151
Description
Microcontrollers (MCU) CAN Transceiver MCU 32K Flash
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC11C24FBD48/301,151

Processor Series
LPC11Cx4
Core
ARM Cortex-M0
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
OM13012,598
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
935294285151
NXP Semiconductors
LPC11CX2_CX4
Product data sheet
7.17.6 APB interface
7.17.7 AHBLite
7.17.8 External interrupt inputs
7.18 Emulation and debugging
The C_CAN ISP command handler uses the CANopen protocol and data organization
method. C_CAN ISP commands have the same functionality as UART ISP commands.
The APB peripherals are located on one APB bus.
The AHBLite connects the CPU bus of the ARM Cortex-M0 to the flash memory, the main
static RAM, and the Boot ROM.
All GPIO pins can be level or edge sensitive interrupt inputs. In addition, start logic inputs
serve as external interrupts (see
Debug functions are integrated into the ARM Cortex-M0. Serial wire debug with four
breakpoints and two watchpoints is supported.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 June 2011
Section
7.17.1).
32-bit ARM Cortex-M0 microcontroller
LPC11Cx2/Cx4
© NXP B.V. 2011. All rights reserved.
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