CYP15G0401DXB-BGC Cypress Semiconductor Corp, CYP15G0401DXB-BGC Datasheet - Page 26

IC TXRX HOTLINK 256LBGA

CYP15G0401DXB-BGC

Manufacturer Part Number
CYP15G0401DXB-BGC
Description
IC TXRX HOTLINK 256LBGA
Manufacturer
Cypress Semiconductor Corp
Series
HOTlink II™r
Type
Transceiverr
Datasheet

Specifications of CYP15G0401DXB-BGC

Package / Case
256-LBGA Exposed Pad, 32-HLBGA
Number Of Drivers/receivers
4/4
Protocol
Multiprotocol
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Product
PHY
Supply Voltage (min)
3.135 V
Supply Current
1.06 A
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CYP15G0401DX-EVAL - IC TXRX HOTLINK 256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Document #: 38-02002 Rev. *L
Dual-Channel Bonded Modes
In dual-channel bonded modes (RX Modes 3 and 5, where
RXMODE[1] = MID or open), the associated receive channel
pair Output Registers must be clocked by a common clock.
This mode does not operate when RXCKSEL = MID.
Proper operation in this mode requires that the associated
transmit data streams are clocked from a common reference
with no long-term character slippage between the bonded
channels. In dual-channel mode this means that channels A
and B must be clocked from a common reference, and
channels C and D must be clocked from a common reference.
Prior to the reception of valid data, a Word Sync Sequence (or
that portion necessary to align the receive buffers) must be
received on the bonded channels (within the allowable
inter-channel skew window) to allow the Receive Elasticity
Buffers to be centered. While normal characters may be output
prior to this alignment event, they are not necessarily aligned
to the same word boundaries as when they were transmitted.
When RXCKSEL = LOW, all four receive channels are clocked
by REFCLK. RXCLKB± and RXCLKD± outputs are disabled
(High-Z), and RXCLKA± and RXCLKC± present a buffered
and delayed form of REFCLK. In this mode, the Receive
Elasticity Buffers are enabled. For REFCLK clocking, the
Elasticity Buffers must be able to insert K28.5 characters and
delete framing characters as appropriate. While these inser-
tions and deletions can take place at any time, they must occur
at the same time on both channels that are bonded together.
This is necessary to keep the data in the bonded channel-pairs
properly aligned. This insert and delete process is controlled
by the channel selected using the RXCLKB+ and RXCLKD+
inputs as listed in Table 16.
When RXCKSEL = HIGH, the A and B channels are clocked
by the selected recovered clock, and the C and D channels are
clocked by the selected recovered clock, as shown in
Table 16. The output clock for the channel A/B bonded-pair is
output continuously on RXCLKA±. The clock source for this
output is selected from the recovered clock for channel A or
channel B using the RXCLKB+ input. The output clock for the
channel C/D bonded-pair is output continuously on RXCLKC±.
The clock source for this output is selected from the recovered
clock for channel C or channel D using the RXCLKD+ input.
Table 16. Dual-Channel Bonded Recovered Clock Select
When data is output using a recovered clock (RXCKSEL =
HIGH), receive channels are not allowed to insert and delete
characters, except as necessary for Elasticity Buffer
alignment.
Quad Channel Modes
In quad-channel modes (RX modes 6 and 7, where
RXMODE[1] = HIGH), all four receive channel Output
Note:
17. Any change in the master device or channel must be followed by assertion of TRSTZ to properly initialize the device.
RXCLKB+
X
X
0
1
RXCLKD+
X
X
0
1
RXCLKA±
RXCLKA
RXCLKB
Clock Source
RXCLKC±
RXCLKC
RXCLKD
Registers must be clocked by a common clock. This mode
does not operate when RXCKSEL = MID.
Proper operation in this mode requires that the four transmit
data streams are clocked from a common reference with no
long-term character slippage between the bonded channels.
In quad-channel modes this means that the transmit channels
A, B, C, and D must all be clocked from a common reference.
Prior to the delivery of valid data, at least one Word Sync
Sequence (or that portion necessary to align the receive
buffers) must be received on all four bonded channels (within
the allowable inter-channel skew window) to allow the Receive
Elasticity Buffers to be centered and aligned.
When RXCKSEL = LOW, all four receive channels are clocked
by the internal derivative of REFCLK. RXCLKB± and
RXCLKD± outputs are disabled (High-Z), and RXCLKA± and
RXCLKC± present a buffered and delayed form of REFCLK.
In this mode the Receive Elasticity Buffers are enabled. For
REFCLK clocking, the Elasticity Buffers must be able to insert
K28.5 characters and delete framing characters as appro-
priate. While these insertions and deletions can take place at
any time, they must occur at the same time on all four
channels. This is necessary to keep the data in the four
bonded channels properly aligned. This insert and delete
process is controlled by the master channel selected using the
RXCLKB+ and RXCLKD+ inputs as listed in Table 15.
When RXCKSEL = HIGH, all four receive-channel Output
Registers are clocked by the selected recovered clock. The
clock select for quad channel mode is the same as that for
independent channel operation. This selection is made using
the RXCLKB+ and RXCLKD+ inputs, as shown in Table 15.
The output clock for the four bonded channels is output contin-
uously on RXCLKA± and RXCLKC±.
When data is output using a recovered clock (RXCKSEL =
HIGH), receive channels are not allowed to insert and delete
characters, except as necessary for Elasticity Buffer
alignment.
Multi-device Bonding
When configured for quad-channel bonding (RXMODE[1] =
HIGH) it is also possible to bond channels across multiple
devices. This form of channel bonding is only possible when
RXCKSEL = LOW, selecting REFCLK as the output clock for
all channels on all devices.
In this mode, the BONDST[1:0] signals of all bonding devices
must be connected together to pass Elasticity buffer
management events between the devices. This is necessary
to keep the data on all bonded devices in common alignment.
One device must be selected as the controlling device by
driving the MASTER pin on that device LOW. All other devices
must have their MASTER pin HIGH to prevent having multiple
active drivers on the BONDST bus. Within the master device,
a single receive channel is selected as the master channel for
generation of the different BONDST[1:0] status. This selection
is made using the RXCLKB+ and RXCLKD+ inputs, as shown
in Table 15. This allows the master channel selection to be
changed through external control of the MASTER, RXCLKB+,
and RXCLKD+ inputs.
[17]
CYW15G0401DXB
CYP15G0401DXB
CYV15G0401DXB
Page 26 of 53

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