CY7B9234-270JXC Cypress Semiconductor Corp, CY7B9234-270JXC Datasheet
CY7B9234-270JXC
Specifications of CY7B9234-270JXC
CY7B9234-270JXC
Available stocks
Related parts for CY7B9234-270JXC
CY7B9234-270JXC Summary of contents
Page 1
... BiCMOS ■ Functional Description ® The CY7B9234 SMPTE HOTLink Transmitter and CY7B9334 SMPTE HOTLink Receiver bolt on to the SMPTE Scrambler Controller (CY7C9235) and SMPTE Descrambler/Framer Controller (CY7C9335) completing the four piece chipset to CY7B9234 Transmitter Logic Block Diagram SC 0− − ENN ...
Page 2
... AC Test Loads and Waveforms ....................................... 10 Transmitter Switching Characteristics Over the Operating Range.................................................................................. 10 Receiver Switching Characteristics Over the Operating Range................................................................ 11 Switching Waveforms for the CY7B9234 SMPTE HOTLink Transmitter ........................................................................ 12 Switching Waveforms for the CY7B9334 Document #: 38-02014 Rev. *B SMPTE HOTLink Receiver ................................................13 SMPTE HOTLink CY7B9234 Transmitter and CY7B9334 Re- ceiver Operation ...
Page 3
... Figure 1. SMPTE HOTLink System Connections HOST CY7B9234 Transmitter Pin Configuration PLCC Top View 2726 28 BISTEN 25 5 GND 24 6 MODE 23 7 7B9234 CCQ SVS 1213 1718 Pin Description CY7B9234 SMPTE HOTLink Transmitter Name I/O Description D TTL In Parallel Data Input. Data is clocked into the Transmitter on the rising edge of CKW if ENA is LOW 0− ...
Page 4
... Pin Description CY7B9234 SMPTE HOTLink Transmitter (continued) Name I/O Description ENN TTL In Enable Next Parallel Data. If ENN is LOW, the data appearing on D CKW is loaded, encoded, and sent. If ENA and ENN are HIGH, the data appearing on D next rising edge of CKW will be ignored and the Transmitter will insert a Null character to fill the space between user data ...
Page 5
... INB± can be used as differential line receiver inter- CC and the INB± pair may be used as a differential serial data input. directly. When left floating (internal resistors hold the MODE pin at a−j or GND. CC CY7B9234 CY7B9334 respectively. b, c,...h . 0−7 output. RVS has ...
Page 6
... Power for internal circuitry. CCQ GND Ground. CY7B9234 SMPTE HOTLink Transmitter Block Diagram Description Input Register The Input register holds the data to be processed by the SMPTE HOTLink transmitter and allows the input timing to be made consistent with standard FIFOs. The Input register is clocked by CKW and loaded with information on the D pins ...
Page 7
... Test logic includes the initialization and control for the Built-In Self-Test (BIST) generator, the multiplexer for Test mode clock distribution, and control logic to properly select the data encoding. Test logic is discussed in more detail in the CY7B9234 SMPTE HOTLink Transmitter Operating Mode Description. excursions of the CKR when no data is present at the serial inputs. The frequency of REFCLK is required to be within ± ...
Page 8
... Test logic includes the initialization and control for the Built-In Self-Test (BIST) generator, the multiplexer for Test mode clock distribution, and control logic for the decoder. Test logic is discussed in more detail in the CY7B9334 SMPTE HOTLink Receiver Operating Mode Description. CY7B9234 CY7B9334 Page [+] Feedback ...
Page 9
... Supply Voltage to Ground Potential ................ −0.5V to +7.0V DC Input Voltage ................................................ −0.5V to +7.0V Output Current into TTL Outputs (LOW) ..................... 30 mA Output Current into PECL outputs (HIGH) .................. −50 mA CY7B9234/CY7B9334 Electrical Characteristics Parameter Description TTL OUTs, CY7B9234: RP; CY7B9334 Output HIGH Voltage OHT V Output LOW Voltage OLT ...
Page 10
... CY7B9234/CY7B9334 Electrical Characteristics Parameter Description Differential Line Receiver Input Pins: INA+, INA−, INB+, INB− V Input Differential Voltage DIFF |(IN+) − (IN−)| V Highest Input HIGH Voltage IHH V Lowest Input LOW Voltage ILL I Input HIGH Current IHH [4] I Input LOW Current ILL ...
Page 11
... CKW, but not RP function or timing pF. L −2.0V, over the operating range. CC /10 if data is being received. See note. CKW , SC/D, and RVS) are loaded with similar DC and AC loads. 0−7 , and V specification (approximately CY7B9234 CY7B9334 7B9234-270 7B9234-400 Unit Min Max Min Max −3 − − ...
Page 12
... Switching Waveforms for the CY7B9234 SMPTE HOTLink Transmitter CKW ENA NOTES 10,11 D – SC/D, SVS, BISTEN RP t CPWL CKW t SD ENN D – SC/D, SVS, BISTEN Document #: 38-02014 Rev CKW t CPWH t CPWL t SENP t t HENP SD VALID DATA PDF t PDR t PPWH t CKW t CPWH ...
Page 13
... NOTE 20 SO Static Alignment t /2− ± INA , ± INB SAMPLE WINDOW Document #: 38-02014 Rev CKR t CPRL PRF t CKX t CPXH 1.5V Error-F ree Window t /2− ± INA ± INB BIT CENTER CY7B9234 CY7B9334 t ROH t EFW t B BIT CENTER Page [+] Feedback ...
Page 14
... DATA SVS RP ± OUTX SMPTE HOTLink CY7B9234 Transmitter and CY7B9334 Receiver Operation The CY7B9234 Transmitter operating with the CY7B9334 Receiver form a general purpose data communications subsystem capable of transporting user data 33Mbytes per second (40 Mbytes per second for -400 devices) over several types of serial interface media ...
Page 15
... VCC and GND pins. Figure 6 illus- trates a SMPTE HOTLink Transmitter and Receiver interface to fiber-optic and copper media. More information on interfacing SMPTE HOTLink to various media can be found in the “HOTLink Design Considerations” application note. CY7B9234 CY7B9334 DATA PARALLEL DATA OUT K28 ...
Page 16
... CY7B9234 SMPTE HOTLink Transmitter Operating Mode Description In normal operation, the Transmitter can operate in either of two modes. The Encoded mode allows a user to send and receive eight (8) bit data and control information without first converting it to transmission characters. The Bypass mode is used for systems in which the encoding and decoding is performed in an external protocol controller ...
Page 17
... Encoded mode. provided to simplify and augment this control function (typically found in laser-based transmission systems). FOTO will force OUTA+ and OUTB LOW, OUTA− and OUTB− HIGH, CY7B9234 CY7B9334 CLOCKED FIFO 7C44X/5X CKR Q 0 − ...
Page 18
... Xs and at [A, B] and [C, D, E]. Document #: 38-02014 Rev. *B Transmitter Test Mode Description The CY7B9234 Transmitter offers two types of test mode operation, BIST mode and Test mode normal system appli- cation, the Built-In Self-Test (BIST) mode can be used to check the functionality of the Transmitter, the Receiver, and the link connecting them ...
Page 19
... ENN HIGH and resume normal function. Note: It may be advisable to send violation characters to test the RVS output in the Receiver. This can be done by explicitly sending a violation with the SVS input, or allowing the transmitter BIST loop to run while the Receiver runs in normal mode. The CY7B9234 CY7B9334 OUTA OUTB OUTC ...
Page 20
... In Bypass mode the serial input data is not decoded, and is trans- ferred directly from the Decode register to the Output register’s 10 bits ( assumed that the data has been pre-encoded a−j prior to transmission, and will be decoded in subsequent logic CY7B9234 CY7B9334 /2) while the clocks CC = 111 00000 7−0 ...
Page 21
... Transmitter, the Receiver and the link connecting them. This mode is available with minimal impact on user system logic, and can be used as part of the normal system diagnostics. Typical connections and timing are shown in Figure 7. CY7B9234 CY7B9334 RVS SC/D Qouts Name 0 000−FF D0.0−31.7 0 100− ...
Page 22
... HOTLink D/Q designation—76543210 8B/10B bit designation—HGFEDCBA To clarify this correspondence, the following example shows the conversion from an FC-2 Valid Data Byte to a Transmission Character (using 8B/10B Transmission Code notation) FC-2 45 CY7B9234 CY7B9334 , 0-7 Fibre Channel Bits: 7654 3210 0100 0101 ...
Page 23
... Running disparity at the end of any sub-block is negative if the sub-block contains more zeros than ones also negative at the end of the 6-bit sub-block if the 6-bit sub-block is 111000, and it is negative at the end of the 4-bit sub-block if the 4-bit sub-block is 1100. CY7B9234 CY7B9334 Page [+] Feedback ...
Page 24
... CY7B9234 CY7B9334 Data OUT Hex Value 765 43210 000 00000 00 000 00001 01 000 00010 010 ...
Page 25
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 26
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 27
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 28
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 29
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 30
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 31
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 32
... CY7B9234 CY7B9334 Page [+] Feedback ...
Page 33
... Code Rule Violation and SVS Tx Pattern 111 00000 100111 1000 111 00001 001111 1010 111 00010 110000 0101 Running Disparity Violation Pattern 111 00100 110111 0101 CY7B9234 CY7B9334 Current RD+ abcdei fghj 110000 1011 110000 0110 110000 1010 110000 1100 110000 1101 110000 0101 110000 ...
Page 34
... Ordering Information Speed Ordering Code [33] 270 CY7B9234-270JC [33] 270 CY7B9234-270JXC [33] 400 CY7B9234-400JC Speed Ordering Code Package Name [34] 270 CY7B9334-270JC [34] 400 CY7B9334-400JC Notes 29. C0.7 = Transmit a deliberate code rule violation. The code chosen for this function follows the normal Running Disparity rules. Transmission of this Special Character has the same effect as asserting SVS = HIGH ...
Page 35
... Document #: 38-02014 Rev. *B 28-Lead Plastic Leaded Chip Carrier J64 SEATING PLANE 26 25 0.045 0.055 19 0.026 0.032 18 CY7B9234 CY7B9334 DIMENSIONS IN INCHES MIN. MAX. 0.013 0.021 0.390 0.430 0.020 MIN. 0.090 0.120 51-85001-*A 0.165 0.180 Page [+] Feedback ...
Page 36
... Description of Change Change SZV Change from Spec number: 38-00629 to 38-02014 BCD Removed data rate 177 Mbps and the corressponding video standard SMPTE-259M-B from the data sheet NVNS Added Pb-Free part CY7B9234-270JXC. Updated Template. psoc.cypress.com clocks.cypress.com image.cypress.com Revised December 15, 2009 CY7B9234 CY7B9334 Page ...