STK14D88-N25I Cypress Semiconductor Corp, STK14D88-N25I Datasheet - Page 6

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STK14D88-N25I

Manufacturer Part Number
STK14D88-N25I
Description
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Datasheet

Specifications of STK14D88-N25I

Word Size
8b
Organization
32Kx8
Density
256Kb
Interface Type
Parallel
Access Time (max)
25ns
Operating Supply Voltage (typ)
3.3V
Package Type
SOIC
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
-40C to 85C
Pin Count
32
Mounting
Surface Mount
Supply Current
70mA
Lead Free Status / Rohs Status
Not Compliant
SRAM READ Cycles #1 and #2
Document Number: 001-52037 Rev. *A
Notes
NO.
4. W must be high during SRAM READ cycles.
5. Device is continuously selected with E and G both low.
6. Measured ± 200 mV from steady state output voltage.
7. HSB must remain high during READ and WRITE cycles.
10
11
1
2
3
4
5
6
7
8
9
t
t
t
AVAV
AVQV
AXQX
#1
[4]
[5]
[5]
DQ (DATA OUT)
t
t
t
t
t
t
t
t
t
t
ADDRESS
t
ELQV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
Symbols
ELEH
#2
[5]
[5]
[6]
[4]
[6]
[3]
[3]
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Alt.
Figure 4. SRAM READ Cycle 1: Address Controlled
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Address Change or Chip Enable to
Output Active
Address Change or Chip Disable to
Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
Figure 5. SRAM READ Cycle 2: E Controlled
10
6
t
AXQX
3
8
5
Parameter
4
1
2
t
AVQV
3
t
AVAV
2
STK14D88-25 STK14D88-35 STK14D88-45
Min
25
3
3
0
0
DATA VALID
Max
29
25
25
12
10
10
25
[4, 7]
[4, 5, 6]
Min
35
3
3
0
0
9
7
Max
11
35
35
15
13
13
35
Min
45
3
3
0
0
STK14D88
Max
45
45
20
15
15
45
Page 6 of 18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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