STK14D88-N25I Cypress Semiconductor Corp, STK14D88-N25I Datasheet - Page 3

• Manufacturer Part Number: STK14D88-N25I
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK14D88-N25I

• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 25ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: -40C to 85C
• Pin Count: 32
• Mounting: Surface Mount
• Supply Current: 70mA
• Lead Free Status / Rohs Status: Not Compliant

Pin Configurations
Pin Descriptions
Document Number: 001-52037 Rev. *A
Note
1. See
Pin Name
DQ
A
V
HSB
V
V
14
NC
7
W
CAP
G
E
CC
-DQ
SS
-A
“Package Diagrams”
0
0
V
DQ
DQ
DQ
NC
NC
NC
NC
V
NC
Power Supply Power: 3.0V, +20%, -10%
Power Supply AutoStore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to
Power Supply Ground
CAP
NC
NC
NC
A
A
NC
A
A
A
A
A
A
A
A
No Connect
SS
14
12
7
6
3
2
1
5
4
0
0
1
2
Input
Input
Input
Input
I/O
I/O
I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-Pin SSOP
on page 16 for detailed package size specifications.
TOP
Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array
Data: Bi-directional 8-bit data bus for accessing the nvSRAM
Chip Enable: The active low E input selects the device
Write Enable: The active low W enables data on the DQ pins to be written to the address location
latched by the falling edge of E
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tri-state.
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled low
external to the chip, it initiates a nonvolatile STORE operation. A weak pull up resistor keeps this pin
high if not connected. (Connection Optional).
nonvolatile storage elements.
Unlabeled pins have no internal connections.
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Figure 1. Pin Diagram 48-Pin SSOP/32-SOIC
V
NC
HSB
W
A
NC
NC
NC
DQ
A
DQ
DQ
DQ
DQ
V
A
NC
NC
V
NC
A
A
G
E
CC
11
10
CC
13
SS
8
9
6
7
5
4
3
Description
Relative PCB Area Usage
V
DQ
DQ
DQ
NC
V
CAP
A
A
A
A
A
A
A
A
A
A
SS
14
12
7
6
3
1
0
5
4
2
0
1
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-SOIC
TOP
[1]
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
HSB
DQ
DQ
DQ
DQ
DQ
V
W
A
A
NC
A
A
A
E
G
CC
11
10
13
8
9
STK14D88
7
6
5
4
3
Page 3 of 18
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