M25PX64-VMF6P NUMONYX, M25PX64-VMF6P Datasheet - Page 59

• Manufacturer Part Number: M25PX64-VMF6P
• Description: 64MB NOR FLASH
• Manufacturer: NUMONYX

Table 18.
1. Typical values given for T
2. t
3. Value guaranteed by characterization, not 100% tested in production.
4. Expressed as a slew-rate.
5. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
6. V
7. When using the page program (PP) instruction to program consecutive bytes, optimized timings are
8. int(A) corresponds to the upper integer part of A. For example int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
Figure 31. Serial input timing
Symbol
t
t
PP
(success or failure) is known. Avoid applying V
obtained with one sequence including all the bytes versus several sequences of only a few bytes (1 ≤ n ≤
256).
t
t
SSE
CH
t
SE
BE
PPH
S
C
DQ0
DQ1
W
(7)
+ t
should be kept at a valid level until the program or erase operation has completed and its result
CL
tCHSL
must be greater than or equal to 1/ f
Alt.
AC characteristics (continued)
tDVCH
Write status register cycle time
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
Program OTP cycle time (64 bytes)
Subsector erase cycle time
Sector erase cycle time
Bulk erase cycle time
Test conditions specified in
High Impedance
A
= 25° C.
MSB IN
tSLCH
Parameter
tCHDX
C
.
PPH
to the W/VPP pin during Bulk Erase.
Table 13
tCLCH
tCHSH
Min
and
LSB IN
int(n/8) × 0.025
Table 15
Typ
1.3
0.8
0.2
0.7
70
68
(1)
tCHCL
tSHSL
tSHCH
(8)
Max
150
160
15
5
3
AI13728
Unit
59/70
ms
ms
ms
ms
s
s