PIC32MX675F512L-80V/PT Microchip Technology, PIC32MX675F512L-80V/PT Datasheet - Page 38
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PIC32MX675F512L-80V/PT
Manufacturer Part Number
PIC32MX675F512L-80V/PT
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 100 TQFP 12x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/PT
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC32MX5XX/6XX/7XX
TABLE 1-1:
DS61156G-page 38
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMCS1
PMCS2
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
Legend: CMOS = CMOS compatible input or output
Note 1:
Pin Name
2:
ST = Schmitt Trigger input with CMOS levels
TTL = TTL input buffer
Pin numbers are provided for reference only. See the
See
QFN/TQFP
Section 24.0 “Ethernet Controller”
64-Pin
PINOUT I/O DESCRIPTIONS (CONTINUED)
30
29
16
22
32
31
28
27
24
23
45
44
45
44
60
61
62
63
64
—
—
—
—
—
—
—
—
8
6
5
4
1
2
3
Pin Number
100-Pin
TQFP
100
44
43
14
12
11
10
29
28
50
49
42
41
35
34
71
70
71
70
93
94
98
99
90
89
88
87
79
80
83
84
3
4
5
(1)
121-Pin
XBGA
C11
D11
C11
D11
L11
L10
K7
F3
F2
F4
E3
K3
A4
B4
B3
A2
A1
D3
C1
D2
A5
E6
A6
B6
A9
D8
D7
C7
L8
L2
L7
J7
J5
L5
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
for more information.
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
Buffer
Type
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
“Pin
Analog = Analog input
O = Output
Diagrams” section for device pin availability.
Parallel Master Port Address bit 0 input
(Buffered Slave modes) and output (Master
modes)
Parallel Master Port Address bit 1 input
(Buffered Slave modes) and output (Master
modes)
Parallel Master Port address (Demultiplexed
Master modes)
Parallel Master Port Chip Select 1 strobe
Parallel Master Port Chip Select 2 strobe
Parallel Master Port data (Demultiplexed
Master mode) or address/data (Multiplexed
Master modes)
© 2009-2011 Microchip Technology Inc.
Description
P = Power
I = Input
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