Si5327-EVB Silicon Laboratories Inc, Si5327-EVB Datasheet - Page 52

• Manufacturer Part Number: Si5327-EVB
• Description: MCU, MPU & DSP Development Tools SI5327 EVAL BOARD
• Manufacturer: Silicon Laboratories Inc

Specifications of Si5327-EVB

• Processor To Be Evaluated: Si5327
• Interface Type: I2C, SPI
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: Details

Si5327
52
Note: Internal register names are indicated by underlined italics, e.g., INT_PIN. See Section “5.Register Map”.
GND PAD
Pin #
29
28
34
35
36
CKOUT1+
CKOUT2+
Pin Name
CKOUT1–
CKOUT2–
CMODE
GND
GND
I/O
O
O
I
Signal Level
LVCMOS
Supply
Multi
Multi
Output Clock 1.
Differential output clock with a frequency range of 2 kHz to
808 MHz. Output signal format is selected by SFOUT1_REG regis-
ter bits. Output is differential for LVPECL, LVDS, and CML compati-
ble modes. For CMOS format, both output pins drive identical
single-ended clock outputs.
Output Clock 2.
Differential output clock with a frequency range of 2 kHz to
808 MHz. Output signal format is selected by SFOUT2_REG regis-
ter bits. Output is differential for LVPECL, LVDS, and CML compati-
ble modes. For CMOS format, both output pins drive identical
single-ended clock outputs.
Control Mode.
Selects I
0 = I
1 = SPI Control Mode
This pin must not be NC. Tie either high or low.
See the Si53xx Family Reference Manual for details on I
operation.
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
Preliminary Rev. 0.4
2
C Control Mode
2
C or SPI control mode for the Si5327.
Description
2
C or SPI