PIC16C505-04I/P Microchip Technology Inc., PIC16C505-04I/P Datasheet - Page 25

• Manufacturer Part Number: PIC16C505-04I/P
• Description: 14 PIN, 1.5 KB OTP, 72 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C505-04I/P

• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 11
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 72 Bytes
• Speed: 4 MHz
• Timers: 1- 8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.1
When an external clock input is used for Timer0, it
must meet certain requirements. The external clock
requirement is due to internal phase clock (T
synchronization. Also, there is a delay in the actual
incrementing of Timer0 after synchronization.
6.1.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of
accomplished by sampling the prescaler output on the
Q2 and Q4 cycles of the internal phase clocks
(Figure 6-4). Therefore, it is necessary for T0CKI to be
high for at least 2T
and low for at least 2T
20 ns). Refer to the electrical specification of the
desired device.
FIGURE 6-4:
1999 Microchip Technology Inc.
T0CKI
Note 1:
Using Timer0 with an External Clock
EXTERNAL CLOCK SYNCHRONIZATION
2:
3:
External Clock/Prescaler
External Clock Input or
Increment Timer0 (Q4)
Output After Sampling
with
Delay from clock input change to Timer0 increment is 3Tosc to 7Tosc. (Duration of Q = Tosc).
Therefore, the error in measuring the interval between two edges on Timer0 input =
External clock if no prescaler selected; prescaler output otherwise.
The arrows indicate the points in time where sampling occurs.
Prescaler Output
TIMER0 TIMING WITH EXTERNAL CLOCK
OSC
the
(and a small RC delay of 20 ns)
OSC
internal
Timer0
(and a small RC delay of
(2)
phase
(3)
Q1 Q2 Q3 Q4
clocks
(1)
OSC
is
)
Q1 Q2 Q3 Q4
T0
When a prescaler is used, the external clock input is
divided by the asynchronous ripple counter-type
prescaler, so that the prescaler output is symmetrical.
For the external clock to meet the sampling
requirement, the ripple counter must be taken into
account. Therefore, it is necessary for T0CKI to have a
period of at least 4T
40 ns) divided by the prescaler value. The only
requirement on T0CKI high and low time is that they
do not violate the minimum pulse width requirement of
10 ns. Refer to parameters 40, 41 and 42 in the
electrical specification of the desired device.
6.1.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0
module is actually incremented. Figure 6-4 shows the
delay from the external clock edge to the timer
incrementing.
TIMER0 INCREMENT DELAY
Q1 Q2 Q3 Q4
T0 + 1
OSC
PIC16C505
4Tosc max.
(and a small RC delay of
Q1 Q2 Q3 Q4
T0 + 2
Small pulse
misses sampling
DS40192C-page 25