PIC16C505-04I/P Microchip Technology Inc., PIC16C505-04I/P Datasheet - Page 20

• Manufacturer Part Number: PIC16C505-04I/P
• Description: 14 PIN, 1.5 KB OTP, 72 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C505-04I/P

• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 11
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 72 Bytes
• Speed: 4 MHz
• Timers: 1- 8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C505
TABLE 5-1:
5.5
5.5.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute
the bit operation and re-write the result. Caution must
be used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit5 of PORTB will cause
all eight bits of PORTB to be read into the CPU, bit5 to
be set and the PORTB value to be written to the output
latches. If another bit of PORTB is used as a bi-
directional I/O pin (say bit0) and it is defined as an
input at this time, the input signal present on the pin
itself would be read into the CPU and rewritten to the
data latch of this particular pin, overwriting the
previous content. As long as the pin stays in the input
mode, no problem occurs. However, if bit0 is switched
into output mode later on, the content of the data latch
may now be unknown.
Example 5-1 shows the effect of two sequential read-
modify-write instructions (e.g., BCF, BSF, etc.) on an
I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-
and”). The resulting high output currents may damage
the chip.
DS40192C-page 20
Address
N/A
N/A
N/A
03h
06h
07h
Legend: Shaded cells not used by Port Registers, read as ‘0’,
Note 1:
I/O Programming Considerations
BI-DIRECTIONAL I/O PORTS
q = depends on condition.
If reset was due to wake-up on pin change, then bit 7 = 1. All other rests will cause bit 7 = 0.
STATUS
PORTB
PORTC
TRISB
TRISC
OPTION
Name
SUMMARY OF PORT REGISTERS
RBWUF
RBWU
Bit 7
—
—
—
—
RBPU
Bit 6
—
—
—
—
—
I/O control registers
I/O control registers
TOCS
Bit 5
PAO
RB5
RC5
TOSE
Bit 4
RB4
RC4
TO
—
Bit 3
= unimplemented, read as ‘0’, x = unknown, u = unchanged,
PSA
RB3
RC3
PD
EXAMPLE 5-1:
;Initial PORTB Settings
; PORTB<5:3> Inputs
; PORTB<2:0> Outputs
;
;
;
;
;Note that the user may have expected the pin
;values to be --00 pppp. The 2nd BCF caused
;RB5 to be latched as the pin value (High).
5.5.2
The actual write to an I/O port happens at the end of
an instruction cycle, whereas for reading, the data
must be valid at the beginning of the instruction cycle
(Figure 5-2). Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should
allow the pin voltage to stabilize (load dependent)
before the next instruction causes that file to be read
into the CPU. Otherwise, the previous state of that pin
may be read into the CPU rather than the new state.
When in doubt, it is better to separate these
instructions with a NOP or another instruction not
accessing this I/O port.
BCF
BCF
MOVLW 007h
TRIS
Bit 2
PS2
RB2
RC2
Z
SUCCESSIVE OPERATIONS ON I/O
PORTS
PORTB, 5
PORTB, 4
PORTB
Bit 1
RB1
RC1
PS1
DC
Bit 0
PS0
RB0
RC0
C
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
PORTB latch
;--01 -ppp
;--10 -ppp
;
;--10 -ppp
----------
--11 1111
--11 1111
1111 1111
0001 1xxx
--xx xxxx
--xx xxxx
Power-On
Value on
1999 Microchip Technology Inc.
Reset
All Other Resets
----------
q00q quuu
PORTB pins
--11 pppp
--11 pppp
--11 pppp
--11 1111
--11 1111
1111 1111
--uu uuuu
--uu uuuu
Value on
(1)