5962-9763101QXA Cypress Semiconductor Corp, 5962-9763101QXA Datasheet - Page 7

• Manufacturer Part Number: 5962-9763101QXA
• Manufacturer: Cypress Semiconductor Corp

Specifications of 5962-9763101QXA

• Lead Free Status / Rohs Status: Not Compliant

DSCC FORM 2234
APR 97
1/
2/
3/
4/
Reset to flag and output time
Output enable to output in
low Z 4/
Output enable to output valid
Output enable to output in
high Z 4/
Write clock to full flag
Read clock to empty flag
Clock to programmable almost-
full flag
Clock to programmable almost-
full flag
Skew time between read clock
and write clock for empty flag
& full flag
Skew time between read clock
and write clock for Almost-Empty
Flag & Almost-Full Flag
All inputs = V
When t
Pulse widths less than the minimum values specified are not allowed.
If not tested, shall be guaranteed to the limits specified in table I.
= either 2t
DEFENSE SUPPLY CENTER COLUMBUS
SKEW1
CLK
COLUMBUS, OHIO 43216-5000
Test
MICROCIRCUIT DRAWING
CC
+ t
 the minimum limit, t
- 0.2 V, except WCLK and RCLK (which are switching at f = 20 Mhz). All outputs are unloaded.
SKEW1
STANDARD
or t
TABLE I. Electrical performance characteristics - Continued.
CLK
Symbol
t RSF
t OLZ
t OE
t OHZ
t WFF
t REF
t PAE
t PAF
t SKEW1
t SKEW2
+ t
SKEW1
FRL
(maximum) = t
C = 30 pF, input pulse levels
= GND to 3.0 V,
input rise/fall times = 3 ns,
input/output timing reference
levels = 1.5 V,
see figures 3 and 4
L
. The latency timing applies only at the empty boundary (E
unless otherwise specified
-55
C  T  +125
C
4.5 V  V
Conditions
CLK
CC
C
 5.5 V
+ t
SKEW1
SIZE
A
. When t
Group A
subgroups
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
9,10,11
REVISION LEVEL
SKEW1
Device
type
< the minimum limit, t
All
All
All
All
All
All
All
All
All
All
Min
15
0
3
3
6




F
Limit
SHEET
= LOW).
5962-97631
Max
15
10
10
10
10
8
8
FRL
7
(max)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns