PEB24911HV13TR Lantiq, PEB24911HV13TR Datasheet - Page 135
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PEB24911HV13TR
Manufacturer Part Number
PEB24911HV13TR
Description
Manufacturer
Lantiq
Datasheet
1.PEB24911HV13TR.pdf
(155 pages)
Specifications of PEB24911HV13TR
Lead Free Status / Rohs Status
Supplier Unconfirmed
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6.4.4
Via the M4 Read Mask register the user can selectively control which M4 bit changes
are to be reported via MON-2 messages. The M4RMASK register is unique for all ports.
M4RMASK
Reset value: 00
Bit 7..0
Below the cross reference of the MASK bits to the M4 bits as they are sent from the NT
to the LT is given:
NIB
Data Sheet
NIB
7
7
M4RMASK - M4 Read Mask Register
001=
010=
011 =
0 =
1 =
Network Indication Bit
H
SAI
6
6
EOC transparent mode without any filtering
- every 6 ms an EOC message is passed on by a MON-0 message
- suitable mode for Digital Loop Carrier applications
- no EOC filtering:
- no acknowledgment
- no execution
- no latching is performed
EOC transparent mode with ’On Change’ filtering
only if a change of the received EOC message has been detected
it is passed on
EOC transparent mode with Triple-Last-Look (TLL) filtering
TLL coverage of EOC messages is enabled
M4 bit change indication by MON-2 message active
M4 bit change indication by MON-2 message masked
interface via a MON-0 message
every 6ms an EOC messages is forwarded to the system
M46
5
5
M4 Read Mask Bits
CSO
4
4
read*
125
)
/write
NTM
3
3
PS2
2
2
Register Description
Address: 07
PS1
1
1
PEF 24911
2001-07-16
ACT
0
0
H
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