PEB24902HV2.1XT Infineon Technologies, PEB24902HV2.1XT Datasheet - Page 39
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PEB24902HV2.1XT
Manufacturer Part Number
PEB24902HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB24902HV2.1XT.pdf
(52 pages)
Specifications of PEB24902HV2.1XT
Number Of Line Interfaces
1
Lead Free Status / Rohs Status
Compliant
- Current page: 39 of 52
- Download datasheet (2Mb)
Figure 11
Table 16
Parameter
Maximum V
POR enable threshold
V
4.3
Transmit path, receive path and auxiliary functions of the analog line port are switched to
a low power consuming mode when the power down function is activated. This implies
the following:
•
•
•
•
•
Data Sheet
DD
The ADC: The relevant pin PDMx is tied to GND.
The DAC and the output buffer: The pins AOUTx BOUTx are tied to GND.
The internal DC voltage reference is switched off.
The range and the loop functions are deactivated.
The digital transmit filter is set to low power consuming mode.
below 1V-time
V
5V
1V
0V
DD
Power Down
DD
Power-on-Reset Behavior of the IEC-4-AFE-X after V
Parameters for POR Activation
slope (rising or falling)
min 80ns
39
Min.
1.0
80
Limit Values
Typ.
Operational Description
Max.
5/4
4.5
POR_Behaviour.vsd
Rev. 1, 2004-05-28
DD
Unit
V/µs
V
ns
time
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PEB 24902
PEF 24902
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