71M6541F-IGT/F Maxim Integrated Products, 71M6541F-IGT/F Datasheet - Page 126

• Manufacturer Part Number: 71M6541F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6541F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 30
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-64
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

environment for the CE by implementing the following steps:
•
•
•
•
•
•
When different CE codes are used, a different set of environment parameters need to be established.
The exact values for these parameters are listed in the Application Notes and other documentation which
accompanies the CE code.
The parameters EQU[2:0] (I/O RAM 0x2106[7:5]), CE_E (I/O RAM 0x2106[0]), and SUM_SAMPS[12:0] are
essential to the function of the CE are stored in I/O RAM (see
details).
5.3.4 Environment
Before starting the CE using the CE_E bit (I/O RAM 0x2106[0]), the MPU has to establish the proper
•
•
Typically, there are thirteen 32768 Hz cycles per ADC multiplexer frame (see
This means that the product of the number of cycles per slot and the number of conversions per frame
must be 12 (plus one settling cycle per frame, see
FIR_LEN[1:0] = 01, I/O RAM 0x210C[2:1], (three cycles per conversion) and MUX_DIV[3:0] = 3 (3
conversions per multiplexer cycle).
Sample configurations can be copied from Demo Code provided by Teridian with the Demo Kits.
5.3.5 CE Calculations
Referring to
0x2106[7:5]).
126
Note:
†
EQU
71M6542F only.
2
Locate the CE code in Flash memory using CE_LCTN[5:0] (I/O RAM 0x2109[5:0])
Load the CE data into RAM
Establish the equation to be applied in EQU[2:0] (I/O RAM 0x2106[7:5])
Establish the number of samples per accumulation period in SUM_SAMPS[12:0] (I/O RAM 0x2107[4:0],
0x2108[7:0])
Establish the number of cycles per ADC multiplexer frame (MUX_DIV[3:0] (I/O RAM 0x2100[7:4]))
Apply proper values to MUXn_SEL, as well as proper selections for DIFFn_E (I/O RAM 0x210C[5:4])
and RMT_E (I/O RAM 0x2709[3]) in order to configure the analog inputs
Initialize any MPU interrupts, such as CE_BUSY, XFER_BUSY, or the power failure detection interrupt
VMAX = 600 V, IMAX = 707 A, and kH = 1 Wh/pulse are assumed as default settings
0
1
†
Operating CE codes with environment parameters deviating from the values specified by Teridian
leads to unpredictable results. See
VA IA – 1 element, 2W 1φ
VA*(IA-IB)/2 – 1 element, 3W 1φ
VA*IA + VB*IB – 2 element, 3W 3φ Delta
Table
78, The MPU selects the desired equation by writing the EQU[2:0] (I/O RAM
Watt & VAR Formula
(WSUM/VARSUM)
Table 78: CE EQU Equations and Element Input Mapping
© 2008–2011 Teridian Semiconductor Corporation
Table 1
Figure 6
VA*(IA-IB)/2
VAR0SUM
and
W0SUM/
Inputs Used for Energy/Current Calculation
VA*IA
VA*IA
Table
and
5.2 I/O RAM Map – Alphabetical Order
Figure
2.
VAR1SUM
W1SUM/
VA*IB
VB*IB
7). The default configuration is
–
2.2.2 Input
IA-IB
I0SQ
SUM
IA
IA
Multiplexer).
I1SQ
SUM
IB
IB
–
for
v1.1