PIC12F683-I/MD Microchip Technology Inc., PIC12F683-I/MD Datasheet - Page 34

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PIC12F683-I/MD

Manufacturer Part Number
PIC12F683-I/MD
Description
8 PIN, 3.5KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/MD

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
6
Memory Type
Flash
Number Of Bits
8
Package Type
8-Pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Serial Interface
None
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F683-I/MD
Manufacturer:
Cirrus
Quantity:
234
PIC12F683
REGISTER 4-2:
REGISTER 4-3:
DS41211B-page 32
bit 7-6:
bit 5-0:
bit 7-6
bit 5-4
bit 3
bit 2-0
TRISIO – GPIO TRI-STATE REGISTER (ADDRESS: 85h)
WPU – WEAK PULL-UP REGISTER (ADDRESS: 95h)
bit 7
bit 7
Unimplemented: Read as ‘0’
TRISIO<5:0>: GPIO Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up register bit
1 = Pull-up enabled
0 = Pull-up disabled
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Note 1: TRISIO<3> always reads ‘1’.
Note 1: Global GPPU must be enabled for individual pull-ups to be enabled.
U-0
U-0
2: TRISIO<5:4> reads ‘1’ in XT, LP and HS modes.
2: The weak pull-up device is automatically disabled if the pin is in output mode
3: The GP3 pull-up is enabled when configured as MCLR and disabled as an I/O in
4: WPU<5:4> reads ‘1’ in XT, LP and HS modes.
(TRISIO = 0).
the Configuration Word.
U-0
U-0
TRISIO5
R/W-1
R/W-1
WPU5
Preliminary
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISIO4
R/W-1
WPU4
R/W-1
TRISIO3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
R-1
R/W-1
WPU2
TRISIO2 TRISIO1
R/W-1
 2004 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPU1
R/W-1
R/W-1
TRISIO0
WPU0
R/W-1
R/W-1
bit 0
bit 0

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