PIC12F683-I/MD Microchip Technology Inc., PIC12F683-I/MD Datasheet - Page 100
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PIC12F683-I/MD
Manufacturer Part Number
PIC12F683-I/MD
Description
8 PIN, 3.5KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12F683-IMD.pdf
(148 pages)
Specifications of PIC12F683-I/MD
A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
6
Memory Type
Flash
Number Of Bits
8
Package Type
8-Pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Serial Interface
None
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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Manufacturer
Quantity
Price
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Part Number:
PIC12F683-I/MD
Manufacturer:
Cirrus
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PIC12F683
CALL
Syntax:
Operands:
Operation:
Status Affected: None
Description:
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41211B-page 98
Call Subroutine
[ label ] CALL k
0
(PC) + 1
k
(PCLATH<4:3>)
Call subroutine. First, return address
(PC + 1) is pushed onto the stack. The
eleven-bit immediate address is loaded
into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH.
CALL is a two-cycle instruction.
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z)
is set.
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
k
PC<10:0>,
f
Z
2047
Z
(W)
127
(f)
TOS,
PC<12:11>
f
Preliminary
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Complement f
[ label ] COMF
0
d
(f)
Z
The contents of register ‘f’ are
complemented. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’,
the result is stored back in
register ‘f’.
Decrement f
[ label ] DECF f,d
0
d
(f) – 1
Z
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT.
Status bits TO and PD are set.
f
f
[0,1]
[0,1]
WDT prescaler,
TO
PD
2004 Microchip Technology Inc.
(destination)
127
127
WDT
(destination)
f,d
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