PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 350

• Manufacturer Part Number: PIC16F1947-I/PT
• Description: 64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1947-I/PT

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 54
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F/LF1946/47
27.5
The LCD driver module can be configured into one of
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
Table 27-4
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
TABLE 27-4:
27.6
The LCDSEn registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
DS41414B-page 350
Multiplex
Note:
Static
1/2
1/3
1/4
LCD Multiplex Types
Segment Enables
for details).
LMUX
<1:0>
On a Power-on Reset, these pins are
configured as normal I/O, not LCD pins.
00
01
10
11
COMMON PIN USAGE
Unused
Unused
Unused
COM3
Active
Unused
Unused
COM2
Active
Active
Unused
COM1
Active
Active
Active
COM0
Active
Active
Active
Active
Preliminary
27.7
The LCDDATAx registers contain bits which define the
state of each pixel. Each bit defines one unique pixel.
Register 27-6
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
27.8
The rate at which the COM and SEG outputs change is
called the LCD frame frequency.
TABLE 27-5:
TABLE 27-6:
Multiplex
LP<3:0>
Static
Note 1: Clock source is F
1/2
1/3
1/4
2
3
4
5
6
7
2: See
Pixel Control
LCD Frame Frequency
Clock source/(4 x (LCD Prescaler) x 32 x 1))
Clock source/(2 x (LCD Prescaler) x 32 x 2))
Clock source/(1 x (LCD Prescaler) x 32 x 3))
Clock source/(1 x (LCD Prescaler) x 32 x 4))
LFINTOSC.
shows the correlation of each bit in the
Figure
Static
FRAME FREQUENCY
FORMULAS
APPROXIMATE FRAME
FREQUENCY (IN Hz) USING
F
32.768 kHz OR LFINTOSC
122
81
61
49
41
35
OSC
Frame Frequency
 2010 Microchip Technology Inc.
27-2.
@ 8 MHz, TIMER1 @
122
1/2
81
61
49
41
35
OSC
/256, T1OSC or
162
108
1/3
81
65
54
47
(2)
=
122
1/4
81
61
49
41
35