PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 195

• Manufacturer Part Number: PIC16F1947-I/PT
• Description: 64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1947-I/PT

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 54
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 20-1:
TABLE 20-1:
 2010 Microchip Technology Inc.
CPSCON0
INTCON
OPTION_REG WPUEN
TMR0
TRISA
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the Timer0 module.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/W-1/1
WPUEN
Name
*
Page provides register information.
Timer0 Module Register
WPUEN: Weak Pull-up Enable bit
1 = All weak pull-ups are disabled (except MCLR, if it is enabled)
0 = Weak pull-ups are enabled by individual WPUx latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
TMR0CS: Timer0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (F
TMR0SE: Timer0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is not assigned to the Timer0 module
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
CPSON
TRISA7
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
INTEDG
Bit 7
R/W-1/1
GIE
OPTION_REG: OPTION REGISTER
Bit Value
INTEDG TMR0CS TMR0SE
CPSRM
TRISA6
000
001
010
011
100
101
110
111
PEIE
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
TMR0CS
R/W-1/1
Timer0 Rate
TMR0IE
TRISA5
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
Bit 5
—
TMR0SE
R/W-1/1
TRISA4
Preliminary
INTE
Bit 4
—
OSC
/4)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-1/1
TRISA3
IOCIE
Bit 3
PSA
PSA
CPSRNG<1:0>
PIC16F/LF1946/47
TMR0IF
TRISA2
Bit 2
R/W-1/1
PS<2:0>
CPSOUT
TRISA1
Bit 1
INTF
PS<2:0>
R/W-1/1
TRISA0
T0XCS
IOCIF
Bit 0
DS41414B-page 195
R/W-1/1
Register
on Page
193*
331
195
128
93
bit 0