PIC18F26K80-I/SO Microchip Technology Inc., PIC18F26K80-I/SO Datasheet - Page 230

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: IC, MCU, nanoWatt; 8-bit w/ECAN; Flash, 64KB; 16MIPS; 8-ch, 12-BIT A/D; SOIC-28
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-I/SO

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SOIC
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F66K80 FAMILY
16.1
The Timer3 Gate Control register (T3GCON), provided
in Register 14-2, is used to control the Timer3 gate.
REGISTER 16-2:
DS39977C-page 230
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
TMR3GE
R/W-0
Timer3 Gate Control Register
Programming the T3GCON prior to T3CON is recommended.
TMR3GE: Timer3 Gate Enable bit
If TMR3ON = 0 :
This bit is ignored.
If TMR3ON = 1 :
1 = Timer3 counting is controlled by the Timer3 gate function
0 = Timer3 counts regardless of Timer3 gate function
T3GPOL: Timer3 Gate Polarity bit
1 = Timer3 gate is active-high (Timer3 counts when gate is high)
0 = Timer3 gate is active-low (Timer3 counts when gate is low)
T3GTM: Timer3 Gate Toggle Mode bit
1 = Timer3 Gate Toggle mode is enabled.
0 = Timer3 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer3 gate flip-flop toggles on every rising edge.
T3GSPM: Timerx Gate Single Pulse Mode bit
1 = Timer3 Gate Single Pulse mode is enabled and is controlling Timer3 gate
0 = Timer3 Gate Single Pulse mode is disabled
T3GGO/T3DONE: Timer3 Gate Single Pulse Acquisition Status bit
1 = Timer3 gate single pulse acquisition is ready, waiting for an edge
0 = Timer3 gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T3GSPM is cleared.
T3GVAL: Timer3 Gate Current State bit
Indicates the current state of the Timerx gate that could be provided to TMR3H:TMR3L. Unaffected by
Timerx Gate Enable (TMR3GE) bit.
T3GSS<1:0>: Timer3 Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR4 to match PR4 output
00 = Timer3 gate pin
Watchdog Timer oscillator is turned on if TMR3GE = 1 , regardless of the state of TMR3ON.
T3GPOL
R/W-0
T3GCON: TIMER3 GATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
T3GTM
R/W-0
T3GSPM
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T3GGO/T3DONE
R/W-0
T3GVAL
(1)
R-x
 2011 Microchip Technology Inc.
x = Bit is unknown
T3GSS1
R/W-0
T3GSS0
R/W-0
bit 0