PIC16F72-I/SP Microchip Technology Inc., PIC16F72-I/SP Datasheet - Page 81

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PIC16F72-I/SP

Manufacturer Part Number
PIC16F72-I/SP
Description
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F72-I/SP

A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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RETFIE
Syntax:
Operands:
Operation:
Status Affected:
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2002 Microchip Technology Inc.
Return from Interrupt
[ label ]
None
TOS → PC,
1 → GIE
None
Return with Literal in W
[ label ]
0 ≤ k ≤ 255
k → (W);
TOS → PC
None
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address).
This is a two-cycle instruction.
Return from Subroutine
[ label ]
None
TOS → PC
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
RETFIE
RETLW k
RETURN
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
Rotate Right f through Carry
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register ‘f’ are
rotated one bit to the right through
the Carry Flag. If ‘d’ = ‘0’, the
result is placed in the W register.
If ‘d’ = ‘1’, the result is placed back
in register ‘f’.
Rotate Left f through Carry
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register ‘f’ are
rotated one bit to the left through
the Carry Flag. If ‘d’ = ‘0’, the
result is placed in the W register.
If ‘d’ = ‘1’, the result is stored
back in register ‘f’.
[ label ]
None
00h → WDT,
0 → WDT prescaler,
1 → TO,
0 → PD
TO, PD
The power-down status bit, PD is
cleared. Time-out status bit, TO
is set. Watchdog Timer and its
prescaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
C
C
RRF f,d
PIC16F72
RLF
SLEEP
Register f
Register f
f,d
DS39597B-page 79

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