PIC16F916-I/SP Microchip Technology Inc., PIC16F916-I/SP Datasheet - Page 127

• Manufacturer Part Number: PIC16F916-I/SP
• Description: 28 PIN, 14 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F916-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 14K Bytes
• Ram Size: 352 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.0
The Programmable Low-Voltage Detect module is an
interrupt driven supply level detection. The voltage
detection monitors the internal power supply.
10.1
The PIC16F917/916/914/913 device supports eight
internal PLVD trip points. See Register 10-1 for avail-
able PLVD trip point voltages.
REGISTER 10-1:
© 2005 Microchip Technology Inc.
PROGRAMMABLE
LOW-VOLTAGE DETECT
(PLVD) MODULE
Voltage Trip Points
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
LVDCON – LOW-VOLTAGE DETECT CONTROL REGISTER (ADDRESS: 109h)
bit 7
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt should not be enabled
LVDEN: Low-Voltage Detect Power Enable bit
1 = Enables PLVD, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD, powers down PLVD and supporting circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Limit bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
000 = 1.9V
Legend:
R = Readable bit
- n = Value at POR
Note 1: The IRVST bit is usable only when the HFINTOSC is running. When using an
U-0
—
2: Not tested and below minimum V
(2)
external crystal to run the microcontroller, the PLVD settling time is expected to be
<50 s when V
should be used after enabling the PLVD module to ensure proper status readings
of the module.
U-0
—
IRVST
R-0
DD
Preliminary
W = Writable bit
‘1’ = Bit is set
= 5V and <25 s when V
PIC16F917/916/914/913
LVDEN
R/W-0
10.1.1
The PIC16F91X stores the PLVD calibration values in
fuses located in the Calibration Word 2 (2009h). The
Calibration Word 2 is not erased when using the spec-
ified bulk erase sequence in the “PIC16F91X Memory
Programming Specification” (DS41244) and thus, does
not require reprogramming.
DD
.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
PLVD CALIBRATION
DD
(1)
= 3V. Appropriate software delays
LVDL2
R/W-1
x = Bit is unknown
LVDL1
R/W-0
DS41250E-page 125
LVDL0
R/W-0
bit 0