PIC16F737-I/SO Microchip Technology Inc., PIC16F737-I/SO Datasheet - Page 238
PIC16F737-I/SO
Manufacturer Part Number
PIC16F737-I/SO
Description
MCU, 8-Bit, 4KW Flash, 368 RAM, 25 I/O, SOIC-28
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F737-ISO.pdf
(276 pages)
Specifications of PIC16F737-I/SO
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
25
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F7X7
FIGURE 18-20:
TABLE 18-16: A/D CONVERSION REQUIREMENTS
DS30498C-page 236
130
131
132
134
Note 1:
Param
No.
Note: If the A/D clock source is selected as RC, a time of T
A/D DATA
SAMPLE
A/D CLK
2:
ADRES
*
†
§
T
T
T
T
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
GO
ADIF
GO
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
This specification ensured by design.
ADRES register may be read on the following T
See Section 12.1 “A/D Acquisition Requirements” for minimum conditions.
Q4
instruction to be executed.
A/D Clock Period
Conversion Time (not including S/H time)
(Note 1)
Acquisition Time
Q4 to A/D Clock Start
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
9
(1)
PIC16F7X7
PIC16LF7X7
PIC16F7X7
PIC16LF7X7
8
OLD_DATA
Sampling Stopped
7
CY
(Note 2)
cycle.
CY
Min
10*
1.6
3.0
2.0
3.0
—
is added before the A/D clock starts. This allows the SLEEP
130
131
T
OSC
Typ†
4.0
6.0
40
—
—
—
—
/2 §
2
Max
6.0
9.0
—
—
12
—
—
—
1
Units
T
—
AD
s
s
s
s
s
s
1 T
0
2004 Microchip Technology Inc.
CY
T
T
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This may
be used if the “new” input
voltage has not changed by
more than 1 LSb (i.e., 5.0 mV @
5.12V) from the last sampled
voltage (as stated on C
If the A/D clock source is
selected as RC, a time of T
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
OSC
OSC
based, V
based, V
DONE
NEW_DATA
Conditions
REF
REF
3.0V
2.0V
HOLD
CY
).
is
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