PIC18F6680-I/PT Microchip Technology Inc., PIC18F6680-I/PT Datasheet - Page 127

• Manufacturer Part Number: PIC18F6680-I/PT
• Description: 64 PIN, 64 KB FLASH, 3328 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6680-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 53
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.3K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

10.9
PORTJ is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISJ. Setting a
TRISJ bit (= 1) will make the corresponding PORTJ pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISJ bit (= 0) will
make the corresponding PORTJ pin an output (i.e., put
the contents of the output latch on the selected pin).
The Data Latch register (LATJ) is also memory
mapped. Read-modify-write operations on the LATJ
register, read and write the latched output value for
PORTJ.
PORTJ is multiplexed with the system bus as the
external memory interface; I/O port functions are only
available when the system bus is disabled. When
operating as the external memory interface, PORTJ
provides the control signal to external memory devices.
The RJ5 pin is not multiplexed with any system bus
functions.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTJ pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. The user should refer to the corre-
sponding peripheral section for the correct TRIS bit
settings.
The pin override value is not loaded into the TRIS reg-
ister. This allows read-modify-write of the TRIS register
without concern due to peripheral overrides.
 2005 Microchip Technology Inc.
Note:
Note:
PORTJ, TRISJ and LATJ Registers
PORTJ is available only on PIC18F8525/
8621 devices.
On a Power-on Reset, these pins are
configured as digital inputs.
PIC18F6525/6621/8525/8621
EXAMPLE 10-9:
FIGURE 10-21:
CLRF
CLRF
MOVLW
MOVWF
RD LATJ
Data
Bus
WR LATJ
or
PORTJ
WR TRISJ
RD TRISJ
RD PORTJ
Note 1: I/O pins have diode protection to V
PORTJ
LATJ
0xCF
TRISJ
TRIS Latch
Data Latch
D
D
CK
CK
; Initialize PORTG by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RJ3:RJ0 as inputs
; RJ5:RJ4 as output
; RJ7:RJ6 as inputs
INITIALIZING PORTJ
PORTJ BLOCK DIAGRAM
IN I/O MODE
Q
Q
Q
EN
DS39612B-page 125
Schmitt
Trigger
Input
Buffer
EN
D
DD
and V
I/O pin
SS
.
(1)