PIC18F6680-I/PT Microchip Technology Inc., PIC18F6680-I/PT Datasheet - Page 123

• Manufacturer Part Number: PIC18F6680-I/PT
• Description: 64 PIN, 64 KB FLASH, 3328 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6680-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 53
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.3K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

FIGURE 10-17:
TABLE 10-13: PORTG FUNCTIONS
TABLE 10-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
 2005 Microchip Technology Inc.
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG4/CCP5/P1D
MCLR/V
Legend: ST = Schmitt Trigger input
PORTG
LATG
TRISG
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’
Note 1:
Name
Name
PP
/RG5
RG5 is available as an input only when MCLR is disabled.
Bit 7
—
—
—
MCLRE
Data Bus
RD TRISA
RD LATA
RD PORTA
High-Voltage Detect
Internal MCLR
MCLR/V
Bit 6
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
—
—
—
Buffer Type
PP
RG5
Bit 5
/RG5 PIN BLOCK DIAGRAM
—
—
ST
ST
ST
ST
ST
ST
(1)
Read PORTG pins/Write PORTG Data Latch
LATG Data Output Register
Data Direction Control Register for PORTG
Bit 4
PIC18F6525/6621/8525/8621
Input/output port pin, Enhanced Capture 3 input/Compare 3 output/
PWM 3 output or Enhanced PWM 3 output P3A.
Input/output port pin, addressable USART2 asynchronous transmit or
addressable USART2 synchronous clock.
Input/output port pin, addressable USART2 asynchronous receive or
addressable USART2 synchronous data.
Input/output port pin, Capture 4 input/Compare 4 output/PWM 4 output
or Enhanced PWM 3 output P3D.
Input/output port pin, Capture 5 input/Compare 5 output/PWM 5 output
or Enhanced PWM 1 output P1D.
Master Clear input or programming voltage input (if MCLR is enabled).
Input only port pin or programming voltage input (if MCLR is
disabled).
Bit 3
Q
Filter
Latch
Bit 2
EN
D
Schmitt
Trigger
Bit 1
Low-Level
MCLR Detect
HV
Function
Bit 0
MCLR/V
--xx xxxx --uu uuuu
---x xxxx ---u uuuu
---1 1111 ---1 1111
POR, BOR
PP
Value on
/RG5
DS39612B-page 121
Value on
all other
Resets